32-Bit Instructions | 16-Bit Instructions | ||
Instruction | Operation | Instruction | Operation |
ABS | Absolute value | ABS_S | Absolute value |
ADC | Add with carry | ||
ADD | Add | ADD_S | Add |
ADD1 | Add with left shift by 1 bit | ADD1_S | Add with left shift by 1 bit |
ADD2 | Add with left shift by 2 bits | ADD2_S | Add with left shift by 2 bits |
ADD3 | Add with left shift by 3 bits | ADD3_S | Add with left shift by 3 bits |
AEX | Swap contents of auxiliary register with a core register | ||
AND | Logical AND | AND_S | Logical AND |
ASL | Arithmetic Shift Left | ASL_S | Arithmetic Shift Left |
ASR | Arithmetic Shift Right | ASR_S | Arithmetic Shift Right |
ASR16 | Arithmetic Shift Right by 16 | ||
ASR8 | Arithmetic Shift Right by 8 | ||
BBIT0 | Branch if bit equal to 0 | ||
BBIT1 | Branch if bit equal to 1 | ||
B | Branch unconditionally | B_S | Branch unconditionally |
Bcc | Branch if condition true | Bcc_S | Branch if condition true |
BCLR | Clear specified bit (to 0) | BCLR_S | Clear specified bit (to 0) |
BI | Branch Indexed, 32-bit full-word table | ||
BIH | Branch Indexed, 16-bit Half-word table | ||
BIC | Bit-wi inverted AND | BIC_S | Bit-wi inverted AND |
BLcc | Branch and Link | BL_S | Branch and Link |
BMSK | Bit Mask | BMSK_S | Bit Mask |
BMSKN | Bit Mask Negated | ||
BRcc | Branch on compare | BRcc_S | Branch on compare |
BRK | Break (halt) processor | BRK_S | Break (halt) processor |
BSET | Set specified bit (to 1) | BSET_S | Set specified bit (to 1) |
BTST | Test value of specified bit | BTST_S | Test value of specified bit |
BXOR | Bit XOR | ||
CLRI | Clear Interrupt Enable | ||
CMP | Compare | CMP_S | Compare |
DIV | Signed integer Divide | ||
DIVU | Unsigned integer Divide | ||
EI_S | Execute Indexed | ||
ENTER_S | Function Prologue Sequence | ||
EX | Atomic Exchange | ||
EXTB | Zero-extend byte | EXTB_S | Zero-extend byte |
32-Bit Instructions | 16-Bit Instructions | ||
Instruction | Operation | Instruction | Operation |
EXTH | Zero-extend 16-bit half-word | EXTH_S | Zero-extend 16-bit half-word脸盆 |
FFS | Find First Set | ||
FLAG | Write to Status Register | ||
FLS | Find Last Set | ||
Jcc | Jump | J_S | Jump |
J | Jump and Link | JL_S | Jump and Link |
JLI_S | Jump and Link Indexed | ||
KFLAG | Write to Status Register in kernel mode | ||
LD LDH LDW LDB | Load from memory | LD_S | Load from memory |
LDI | Load Indexed | LDI_S | Load Indexed |
LEAVE_S | Function Epilogue Sequence | ||
LLOCK | Load locked | 期颐怎么读 | |
LPcc | Loop (zero-overhead loops) | ||
LR | Load from Auxiliary memory | ||
LSL16 | Logical Shift Left 16 | ||
LSL8 | Logical Shift Left 8 | ||
LSR | Logical Shift Right | LSR_S | Logical Shift Right |
LSR16 | Logical Shift Right 16 | ||
LSR8 | Logical Shift Right 8 | ||
MAX | Return Maximum | ||
MIN | Return Minimum | ||
MOV | Move (copy) to register | MOV_S | Move (copy) to register |
MPY | 32 x 32 Signed Multiply (lsw) | MPY_S | 32 x 32 Signed Multiply (lsw) |
MPYM MPYH | 32 x 32 Signed Multiply (msw) | ||
MPYMU MPYHU | 32 x 32 Unsigned Multiply (msw) | ||
MPYU | 32 x 32 Unsigned Multiply (lsw) | ||
MPY | 16 X 16 unsigned multiply | ||
MPYW | 16 X 16 signed multiply | ||
NEG | Negate | NEG_S | Negate |
NOP | No operation | NOP_S | No operation |
NORM | Normalize to 32 bits | ||
NORMH NORMW | Normalize to 16 bits | ||
NOT | Logical bit inversion | NOT_S | Logical bit inversion |
OR | Logical OR | OR_S | Logical OR |
POP_S | Restore register from stack | ||
PREFETCH | Prefetch from memory | ||
32-Bit Instructions | 16-Bit Instructions | ||
Instruction | Operation | Instruction | Operation |
PUSH_S | Store register to the stack | ||
RCMP | Rever Compare | ||
REM | Signed Integer Remainder | ||
REMU | Unsigned Integer Remainder | ||
RLC | 2012年7月28日 Rotate Left through Carry | ||
ROR | Rotate Right | ||
ROR8 | Rotate Right 8 | ||
ROL | Rotate Left | ||
ROL8 | Rotate Left 8 | cnds | |
RRC | Rotate Right through Carry | ||
RSUB | Rever Subtraction | ||
RTIE | Return from Interrupt or Exception | ||
SBC | Subtract with carry | ||
SCOND | Store conditionally | ||
SETcc | Set conditional | ||
SETI | Set Interrupt Enable | ||
SEXB | Sign-extend byte | SEXB_S | Sign-extend byte |
SEXH SEXW | Sign-extend half-word | SEXH_S | Sign-extend 16-bit half-word |
SLEEP | Put processor in sleep state | ||
SR | Store to Auxiliary memory | ||
ST | Store to memory | ST_S | Store to memory |
SUB | Subtract | SUB_S | Subtract |
SUB1 | Subtract with left shift by 1 bit | ||
SUB2 | Subtract with left shift by 2 bit | ||
SUB3 | Subtract with left shift by 3 bit | ||
SWAP | Swap 16 x 16 | ||
| mp3电子书 SWAPE | Swap byte ordering | ||
SWI | Software interrupt | doi是什么意思SWI_S | Software interrupt |
SYNC | Synchronize | ||
TRAP_S | Trap to system call | ||
TST | Test | TST_S | Test |
XOR | success的动词Logical Exclusive-OR | XOR_S | Logical Exclusive-OR |
UNIMP_S | Unimplemented Instruction | ||
Instruction | Operation | Description |
ADD | a ← b + c | add |
ADD_S | a ← b + c | add |
ADC | a ← b + c + C | add with carry |
SUB | a ← b – c | subtract |
SBC | a ← (b – c) - C | subtract with carry |
AND | a ← b and c长颈鹿英语 | logical bitwi AND |
OR | a ← b or c | logical bitwi OR |
BIC | a ← b and not c | logical bitwi AND with invert |
XOR | a ← b exclusive-or c | logical bitwi exclusive-OR |
MAX | a ← b max c | larger of 2 signed integers |
MIN | a ← b min c | smaller of 2 signed integers |
MOV | b ← c | move |
TST | b and c | test |
CMP | b - c | compare |
RCMP | c - b | rever compare |
RSUB | a ← c - b | rever subtract |
BSET | a ← b or (1<<c) | bit t |
BCLR | a ← b and not (1<<c) | bit clear |
BTST | b and (1<<c) | bit test |
BXOR | a ← b xor (1<<c) | bit xor |
BMSK | a ← b and ((1<<(c+1))-1) | bit mask |
BMSKN | a ← b and ~((1<<(c+1))-1) | bit mask inverted |
ADD1 | a ← b + (c << 1) | add with left shift by 1 |
ADD2 | a ← b + (c << 2) | add with left shift by 2 |
ADD3 | a ← b + (c << 3) | add with left shift by 3 |
SUB1 | a ← b - (c << 1) | subtract with left shift by 1 |
SUB2 | a ← b - (c << 2) | subtract with left shift by 2 |
SUB3 | a ← b - (c << 3) | subtract with left shift by 3 |
MPY | a ← (a X c).low | 32 × 32 signed multiply |
MPYM | a ← (a X c).high | 32 × 32 signed multiply |
MPYMU | a ← (a X c).high | 32 × 32 unsigned multiply |
MPYU | a ← (a X c).low | 32 × 32 unsigned multiply |
MPYW | a ← (word) b * (word) c | 16 × 16 signed multiply |
MPYUW | a ← (word) b * (word) c | 16 × 16 unsigned multiply |
ASL | a ← b asl 1 | arithmetic shift left 1 place |
ASR | a ← b asr 1 | arithmetic shift right 1 place |
LSR | a ← b lsr 1 | logical shift right 1 place |
ROL | a ← b rol 1 | rotate left 1 place |
ROR | a ← b ror 1 | rotate right 1 place |
DIV | a ← b / c | Signed integer division |
DIVU | a ← b / c | Unsigned integer division |
REM | a ← b % c | Signed integer remainder |
REMU | a ← b % c | Unsigned integer remainder |
SOPs | A field is sub-opcode2 | See Single operand SOP table |
RLC | a ← (b, C) rlc 1 | rotate left 1 place through carry |
RRC | a ← (C, b) rrc 1 | rotate right 1 place through carry |
NEG | LSB MSB | Negate |
Instruction | Operation | Description |
LR | b ← [c] | Load from auxiliary register |
SR | [c] ← b | Store to auxiliary register |
Instruction | Operation | Description |
MOV | Move | |
SEXB | b ← xb (c) | Sign extend byte |
SEXH | b ← xh (c) | Sign extend half-word (16-bits) |
EXTB | b ← extb (c) | Zero extend byte |
EXTH | b ← exth (c) | Zero extend half-word (16-bits) |
NOT | b ← not (c) | Logical NOT |
ABS | b ← abs (c) | Absolute |
FLAG | Set flags | |
ASL | b ← c+c | Arithmetic shift left by one |
RLC | b ← rlc (c) | Rotate left through carry |
ASR | b ← asr (c) | Arithmetic shift right by one |
LSR | b ← lsr (c) | Logical shift right by one |
ROR | b ← ror (c) | Rotate right |
RRC | b ← rrc (c) | Rotate right through carry |
EX | b ← mem[c]; mem[c] b | Atomic Exchange |
ROL | b ← rol(c) | Rotate left |
LLOCK | b ← mem[c]; LF ← 1; | Load locked |
SCOND | if LF mem[c] ♦ b | Store conditional |
ZOPs | B field is theonly什么意思sub-opcode3 | See Zero operand (ZOP) table |
Extension Single Operand Instructions | ||
SWAP | b ← swap (c) | Swap words |
NORM | b ← norm (c) | Normalize |
NORMH | b ← norm (c) | Normalize word |
SWAPE | b ← swap_endian (c) | Swap endianness |
LSL16 | a ← b lsl16 (c) | Logical shift left 16 |
LSR16 | a ← b lsr16 (c) | Logical shift right 16 |
ASR16 | a ← b asr16 (c) | Arithmetic shift right 16 |
ASR8 | a ← b asr8 (c) | Arithmetic shift right 8 |
LSR8 | a ← b lsr8 (c) | Logical shift right 8 |
LSL8 | a ← b lsl8 (c) | Logical shift left 8 |
ROL8 | a ← b rol8 (c) | Rotate left 8 |
ROR8 | a ← b ror8 (c) | Rotate right 8 |
FLS | a ← b fls (c) | Find last t |
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