FORMATION OF ULTRASHALLOW JUNCTIONS IN 500EV BORON IMPLANTED SILICON USING NONMELT LASER ANNEALING
insistenceSusan Earles, Jackie Frazer, Mark Law, Kevin Jones, Somit Talwar, Dan Downey, and Edwin Arevalo
naiS. Earles and M. Law
Department of Electrical and Computer Engineering, University of Florida大学英语四六级词汇
538 Engineering Bldg #33 , Gainesville FL 32611 USA
email:ske@tec.ufl.edu and law@tec.ufl.edu
phone: 352-392-1019FAX: 352-392-8381
K. Jones and J. Frazer
Department of Materials Science, University of Florida
538 Engineering Bldg #33, Gainesville FL 32611 USA
email:kjones@m.ufl.edu
phone: 352-392-1019FAX: 352-392-8381
S. Talwar
教育部考试中心托福Verdant Technologies
拼写3050 Zanker Rd, San Jo, CA 95134 USA
email: stalwar@
找外教一对一
phone: 408-577-3566bec中级真题
D. Downey and
E. Arevalo
Varian Semiconductor Equipment Associates, Inc.
811 Hann Way, Palo Alto, CA 95134
email: dan.
openerp
phone: 408-577-3566
SUBMITTED FOR PUBLICATION IN ELECTRON DEVICE LETTERS
Abstract-Nonmelt lar annealing (NLA) is ud to form heavily-doped, ultra-shallow regions in boron implanted crystalline silicon. Results are compared to samples receiving a conventional 1050o C spike anneal. A high-do non-amorphizing boron implant of 1015ions/cm2 at 500eV is ud. The implant is lar annealed with between one and 1000 20ns long puls or a 1050o C spike anneal. NLA alone produces junction depths from 21 to 25nm with sheet resistances around 800Ω/sq, while spike annealing results in 40nm junctions at ~2400Ω/sq. Hall effect measurements produce mobilities around 30cm2/V-s. Plan-view TEM shows damage from the implant is completely removed after 100 puls. Thus, nonmelt lar annealing alone can be ud to produce shallower junctions with lower resistivity than conventional RTA offering junction characteristics suitable for the 2007 65nm ITRS technology node.
FORMATION OF ULTRASHALLOW JUNCTIONS IN 500EV BORON IMPLANTED SILICON USING NONMELT LASER ANNEALING
Susan Earles, Jackie Frazer, Mark Law, Kevin Jones, Somit Talwar, Dan Downey, and Edwin Arevalo
Introduction
One of the key issues involved in device scaling is reducing the depth of the p-type source/drain regions while maintaining low resistance. For sub-100nm devices, junction depths less than 30nm and sheet resistances less than 1000 Ω/sq are required[1]. The industry standard technique for junction formation is ultra-low energy ion implantation followed by a spike anneal. During the spike anneal, significant diffusion, boron clustering, and defect evolution occurs [2-4] which result in deeper junctions and incread sheet resistance.
傲骨贤妻第六季Experiments have shown that increasing the ramp rate during thermal processing has resulted in a decrea in the boron junction depth [5-7]. Plots of the diffusion length versus ramp rate show that ramp rate needs to be around 1010o C/c to result in a diffusion length of zero[8]. This ramp rate is not achievable in conventional RTA systems. However, using a lar for thermal processing with a power below required to melt the silicon can achieve the temperature ramp rates.
This study explores using a lar in non melt mode to provide 20ns spike anneals of ultra-low energy boron implants in silicon. The anneals are compared to conventional spike anneals for junction depth, sheet resistance, and activation percentage. Lar annealing offers
considerable advantage compared to conventional spike annealing, and is suitable for the 70nm junction node of the ITRS road map.
Experimental
A 500eV, 1015 ions/cm2 B+ implant into a CZ grown <100> silicon wafer is annealed with a 532nm lar using 20ns puls at an energy density of 0.35J/cm2. The frequency of the puls is 100Hz. For comparison with conventional annealing, the same implant is given a 1050o C spike anneal. The lar energy density is t at 0.35J/cm2 in order to anneal without melting. At around 0.37J/cm2 the reflectivity of the surface (measured with a HeNe lar) plateaus indicating that surface melting has occurred. The lar irradiates an area 1 x 1cm2 with less than 3% variation in the beam over that area. For the 532nm lar, the absorption depth into crystalline silicon is around 80nm [9]. Therefore, during a 20ns pul at 0.35J/cm2, the surface temperature reaches approximately 1200-1400o C while the bulk of the sample remains at room temperature. After each 20ns pul, the bulk acts as a heat sink for the surface region allowing the sample to cool down rapidly between puls. Since the projected range of the 500eV boron implant is at 2.5nm, the entire boron profile is expected to be heated during the NLA.
Results and Discussion
酒桌礼仪
SIMS of the as-implanted and lar annealed boron (11B) profiles are shown in Figure 1 along with the sample receiving the spike anneal. No diffusion was obrved following 1 and 10 puls. However, the profiles following 100 and 1000 lar puls did show slight diffusion as the profiles begin to break away from the as-implanted profile at a concentration around 1021/cm3. Diffusion does not appear to occur in the tail region of the profile below 3x1017/cm3
resulting in 21 to 25nm junctions at 1018/cm3. The sample receiving the spike anneal results in a junction ~40nm which is nearly twice tho obtained with the NLA. The spike annealed sample exhibits greater diffusion throughout the profile.
The sheet resistance measurements shown in Figure 2 are determined using four-point probe and Hall effect measurements on square samples using indium contacts. Standard deviation for the sheet resistance values for each sample was between 2 and 6%. Mobilities and sheet carrier dos were determined using room temperature Hall measurements. Hall data is converted using a value of 0.7 for r, the Hall scattering factor. Due to the high doping levels (>5e19/cm3) determination of the Hall scattering factor becomes difficult as the impurity levels move into the valence band and both ionized and neutral impurity scattering dominate [10]. Following the NLA the mobility is approximately constant at 30cm2/V-s while the boron activation ranged from 19 to 35% following 100
puls (Figure 3). The activation is found to increa with the number of lar puls. For the spike anneal the mobility was ~60cm2/V-s but the percent activation was less than 20%. Plan-view TEM results show that following 100 puls no obrvable defects remain. This suggests that NLA alone can be ud to repair the implant damage which should help reduce junction leakage.
Conclusion
In conclusion, the effects of nonmelt lar annealing on boron implanted silicon have been investigated. Using 100 or more puls the NLA can completely remove implant damage. Sheet resistance has been shown to decrea with increasing number of lar puls. Also, the mobility
and boron activation increa as the number of lar puls increas resulting in junctions from 21 to 25nm deep with sheet resistances around 800 Ohms/square.
Acknowledgments
The authors would like to thank the SRC and SEMATECH for providing funding for this rearch and Gana Rimple for assistance with the NLA.
