Chapter 1 Introduction
1. 日语二级词汇What is the purpo of interrupts? What are the differences between a trap and an interrupt? Can traps be generated intentionally by a ur program? If so, for what purpo?
Answer: An interrupt is a hardware-generated change-of-flow within the system. An interrupt handler is summoned to deal with the cau of the interrupt; control is then returned to the interrupted context and instruction. A trap is a software-generated interrupt. An interrupt can be ud to signal the completion of an I/O to obviate the need for device polling. A trap can be ud to call operating system routines or to catch arithmetic errors.
2. Direct memory access is ud for high-speed I/O devices in order to avoid increasing the CPU´s execution load.
a. How does the CPU interface with the device to coordinate the transfer?
cordyb. How does the CPU know when the memory operations are complete?
c. The CPU is allowed to execute other programs while the DMA controller is transferring data. Does this process interfere with the execution of the ur programs? If so, describe what forms of interference are caud.
Answer:
(a)The CPU can initiate a DMA operation by writing values into special registers that can be independently accesd by the device.
(b)The device initiates the corresponding operation once it receives a command from the CPU. When the device is finished with its operation, it interrupts the CPU to indicate the completion of the operation.
(c)Both the device and the CPU can be accessing memory simultaneously. The memory controller provides access to the memory bus in a fair manner to the two entities. A CPU might therefore be unable to issue memory operations at peak speeds since it has to compete with the device in order to obtain access to the memory bus.
3. Some computer systems do not provide a privileged mode of operation in hardware. Is it possible to construct a cure operating system for the computer systems? Give arguments both that it is and that it is not possible.
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Answer: An operating system for a machine of this type would need to remain in control (or monitor mode) at all times. This could be accomplished by two methods:rybak
jerry maguirea. Software interpretation of all ur programs (like some BASIC, Java, and LISP systems, for example). The software interpreter would provide, in software, what the hardware does not provide.
b. Require meant that all programs be written in high-level languages so that all object code is compiler-produced. The compiler would generate (either in-line or by function calls) the protection checks that the hardware is missing.
halfway
4. Give two reasons why caches are uful. What problems do they solve?
What problems do they cau? If a cache can be made as large as the device for which it is caching (for instance, a cache as large as a disk), why not make it that large and eliminate the device?
Answer: Caches are uful when two or more components need to exchange data, and the components perform transfers at differing speeds. Caches solve the transfer problem by providing a buffer of intermediate speed between the components. If the fast device finds the data it needs in the cache, it need not wait for the slower device. The data in the cache must be kept consistent with the data in the components. If a component has a data value change, and the datum is also in the cache, the cache must also be updated. This is especially a problem on multiprocessor systems where more than one process may be accessing a datum. A component may be eliminated by an equal-sized cache, but only if: (a) the cache and the component have equivalent state-saving capacity (that is, if the component retains its data when electricity is removed, the cache must retain dat
a as well), and (b) the cache is affordable, becau faster storage tends to be more expensive.
5. Describe a mechanism for enforcing memory protection in order to prevent a program from modifying the memory associated with other programs.
Answer: The processor could keep track of what locations are associated with each process and limit access to locations that are outside of a program’s extent. Information regarding the extent of a program’s memory could be maintained by using ba and limits registers and by performing a check for every memory access.
spansionChapter 2 Operating-System Structures
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kicker1. What are the two models of interprocess communication? What are the strengths and weakness of the two approaches?
Answer: The two models of interprocess communication are message passing model and the shared-memory model.
The message-passing model exchange message either directly or indirectly. It is uful for exchanging smaller amounts of data and easier to implement for intercomputer communication. Its speed is slower than shared-memory model.
shelter是什么意思
