Stacked via Kelvin resistance test structure for m

更新时间:2023-07-07 05:37:49 阅读: 评论:0

globalization作文专利名称:Stacked via Kelvin resistance test structure
for measuring contact anomalies in multi-
sine
level metal integrated circuit technologies
发明人:Robert Alan Ashton,Steven Alan Lytle,Mary
Drummond Roby,Daniel Joph Vitkavage
申请号:US09388203
申请日:19990901
公开号:US06362638B1佳能广告曲
公开日:
读万卷书不如行万里路英文>初二下册英语语法
icbc 爱存不存20020326
专利内容由知识产权出版社提供
专利附图:
摘要:A method and apparatus for measuring Kelvin contact resistance within an
ville
integrated circuit interconnect is provided, having upper and lower Kelvin contact resistance contacts covering a via and interconnect being measured, along with a third conductor placed substantially between the upper and lower Kelvin contacts, and in contact with the via.
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播音主持培训课程申请人:AGERE SYSTEMS GUARDIAN CORP.
代理机构:Alston & Bird LLP
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