Circuit Note
CN-0219
Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit /CN0219.
Devices Connected/Referenced ADAU1761 SigmaDSP® Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAV801/ ADAV803
Audio Codec for Recordable DVD (SPI/I 2C Control Interface)
S/PDIF and I 2S Interface for a SigmaDSP Codec Using the ADAV801/ADAV803 Audio Codec
Rev.0
Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room t开除英文
emperature. However , you are solely responsible for testing the circuit and determining its suitability and applicability for your u and application. Accordingly , in no event shall Analog Devices be liable for direct, indirect, special, incidental, conquential or punitive damages due to any cau whatsoever connected to the u of any Circuits from the Lab circuits. (Continued on last page)
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EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
steel pipeADAU1761 Evaluation Board (EVAL-ADAU1761Z) USBi USB Interface Board (EVAL-ADUSB2EBZ) (Included with EVAL-ADAU1761Z Board)
ADAV801 Evaluation Board (EVAL-ADAV801EBZ) or ADAV803 Evaluation Board (EVAL-ADAV803EBZ) Design and Integration Files
英语四级成绩查询网Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
S/PDIF (Sony/Philips Digital Interface) is a high quality digital audio format that is commonly ud in consumer electronics and is ud to interconnect audio equipment. Many audio codecs/DSPs only support I 2S as digital audio input/output, which is a problem when using the parts in circuits that need to support both S/PDIF or the AES (Audio Engineering Society) professional standard.
ADAU1761 MASTER
all in one
09970-001
Figure 1. ADAV801/ADAV803 Connections for S/PDIF In/Out to ADAU1761 SigmaDSP (Simplified Schematic: Power Supply Decoupling and All Connections Not Shown)
CN-0219
Circuit Note
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The circuit, in Figure 1, shows how to overcome this problem by connecting the ADAV801 or the ADAV803 audio codec to a SigmaDSP® device, such as the ADAU1761.
The audio input in S/PDIF format is converted to I 2S before processing by the ADAU1761, and the procesd audio output in I 2S format is converted back to S/PDIF by the ADAV801/ ADAV803. The ADAV801/ ADAV803 has a flexible digital input/output routing matrix that allows it to process audio in either I 2S or S/PDIF format and output it in either format as a master or slave with the u of an onb
oard SRC (sample rate converter). The ADAV801/ ADAV803 support the consumer audio standard, and channel status data can be embedded in the audio stream by writing to the relevant registers in the ADAV801/ ADAV803. This is a uful feature for passing configuration information between devices. The ADAV801/ ADAV803 has a stereo DAC/ADC that can also be ud to process audio as needed.
CIRCUIT DESCRIPTION
The ADAV801/ ADAV803 has two ts of input/output I 2S ports, either of which can be ud. In the configuration shown in Figure 1, the playback port ILRCLK and record port OLRCLK pins are connected to the LRCLK pin of the
ADAU1761. The IBCLK and OBCLK pins are connected to the BCLK pin of the ADAU1761. The ISDATA pin is connected to the ADC_SDATA pin of the ADAU1761, and the OSDATA is connected to the DAC_SDATA pin of the ADAU1761. The S/PDIF input comes from the TORX173 fiber optic
receiver module into the DIRIN pin and is then output to the ADAU1761 on the record port in I 2S format. Once the audio is procesd by the ADAU1761 SigmaDSP® device it is output on the ADC_SDATA pin to the playback port of the ADAV801/ ADAV803 in I 2S format. It is then converted t
o S/PDIF format on the DITOUT pin and fed to the TOTX173 fiber optical transmitter module.
The circuit is powered from a 3.3 V AVDD supply. The master clock for the circuit is generated either by the ADAV801/ ADAV803 or by an external oscillator, depending on whether the ADAU1761 is to be configured as master or slave. In the ca where the ADAU1761 is a slave, i.e. the BLCK and LRCLK are driven by the ADAV801/ ADAV803, the MCLK is 256× the recovered audio clock from the S/PDIF stream. It can also be configured to be 512× the recovered clock. This clock is
accesd on the SYSCLK3 pin of the ADAV801/ ADAV803 and connected to the MCLK pin of the ADAU1761.
When the ADAU1761 is master, the MCLK is generated by an onboard oscillator and is supplied to the ADAV801/ADAV803 on the MCLKI pin. In this ca, the ADAU1761 drives the LRCLK and BCLK lines, and the SRC on the ADAV801/
ADAV803 is ud to synchronize the audio between the I 2S port and the S/PDIF port.
Register Settings
A complete design support documentation package for this circuit note can be found at www.analog.
com/CN0219-DesignSupport . This includes register tting files for both master and slave configuration for the ADAV801/ADAV803 and ADAU1761. The register ttings files can be loaded using the relevant evaluation board software.
COMMON VARIATIONS
This circuit can also be t up with any part that has a
SigmaDSP processor core and requires an S/PDIF/AES audio interface, including the ADAU1401A , ADAU1701, and ADAU1781. Although not described in this circuit note, the above circuit can be modified to work with the AES audio
format. Instead of optical connectors, XLR connectors would be ud, and transformers would be required to convert from differential to single-ended signals and vice versa.
CIRCUIT EVALUATION AND TEST
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This circuit is tested using the ADAV801/ ADAV803 (EVAL-ADAV801EBZ or EVAL-ADAV803EBZ ) and ADAU1761 (EV AL-ADAU1761Z ) evaluation boards. The necessary connections between the two boards and link configurations are contained in the design support
documentation . Figure 2 shows the full test tup using both evaluation boards.
Equipment Needed
The ADAU1761 evaluation board is programmed using SigmaStudio thru a USBI board (EV AL-ADUSB2EBZ ). The SigmaStudio GUI software requires a PC with the following: Windows® 7, Windows Vista, or Windows XP Professional or Home Edition with SP2, 128 MB of RAM (256 MB recom-mended), 50 MB of available hard disk space, 1024 × 768 screen resolution, and USB 1.1/2.0 data port. The ADAV801/
ADAV803 board is controlled using the printer port of a PC with its own software that can be downloaded from the ADI website. Two optical connectors are needed to connect the S/PDIF input/output to the ADAV801/ ADAV803 board. Eight single pin jumper cables are needed to make the necessary connections between the two evaluation boards.
Getting Started
From this point, follow the documentation for the
EV AL-ADAU1761Z and EV AL-ADAV801/ EV AL-ADV803EBZ regarding software installation, tu
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p, and operation of the system.
Circuit Note
CN-0219
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The SigmaStudio software is ud to program and tune the registers and SigmaDSP core in the ADAU1761. SigmaStudio can be downloaded from /sigmastudio . The software for the ADAV801/ ADAV803 can also be downloaded from the ADI website. Once the software is
special是什么意思installed, the register tting files in the design documentation can be loaded to program both boards depending on whether you want the ADAU1761 device to be master or slave. The ADAU1761 SigmaStudio project has just a simple audio pass-thru with volume control for the purpos of testing the circuit of Figure 1.
+12V
USB TO PCsweety什么意思
EVAL-ADUSB2EBZ
I 2C
−12V FIBER OPTIC OUTPUT
PARALLEL PORT
TO PC
09970-002
Figure 2. Test Setup for Connecting the ADAV801/ADAV803 Board to the ADAU1761 Board
CONNECTIONS
(SEE DESIGN SUPPORT DOCUMENTS)
09970-003
Figure 3. Functional Diagram of Test Setup
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Circuit Note
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Setup and Test
An Audio Precision APx585 multichannel audio analyzer can be ud to generate the S/PDIF input a
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nd capture the S/PDIF output. With the ADAU1761 as master and a full-scale 1 kHz input tone, the THD + N should be ~130 dB at the S/PDIF output. In slave mode, the THD + N should be ~142 dB, since there is no SRC needed to synchronize the S/PDIF stream to the ADAU1761 I 2S stream.
LEARN MORE
CN0219 Design Support Package:
yell是什么意思/CN0219-DesignSupport
Gildersleeve, Brett, Using the EVAL-ADUSB2EBZ , Application Note AN-1006, Analog Devices. SigmaStudio™ Graphical Development Tool: /sigmastudio
Data Sheets and Evaluation Boards ADAU1761 Data Sheet ADAU1761 Evaluation Board ADAV801 Data Sheet ADAV803 Data Sheet
ADAV801/ADAV803 Evaluation Board and Software
REVISION HISTORY
10/11—Revision 0: Initial Version
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CN09970-0-10/11(0)
