Method for reducing stress and improving step-cove

更新时间:2023-06-28 20:20:11 阅读: 评论:0

专利名称:Method for reducing stress and improving step-coverage of tungsten interconnects
在某处and plugs
英语二自考>日语翻译培训发明人:Jiun-Chung Lee,Hui-Ling Wang,Jowei
在线英文签名Dun,Ken-Shen Chou
什么是抑郁症申请号:US08/907985
申请日:19970811
沟通技巧培训
公开号:US05956609A
公开日:
泰国人妖空姐
19990921
专利内容由知识产权出版社提供
摘要:A method is described for improving the step coverage of tungsten interconnects and plugs when deposited at low temperatures into contact/via openings having high aspect ratios. The depositions are made at pressures between 4.5 and 100 Torr in a CVD tool. The method includes a first nucleation step, and a cond step for filling the contact/via openings wherein deposition conditions favor good step coverage. For forming an interconnect and a third deposition step, providing moderate step coverage and low stress, is ud to build up the interconnect. The high pressures permit deposition at practical rates at low temperatures. In addition the high pressures also permit application of backside gas pressure to the wafer during deposition, thereby improving the thermal contact between the wafer and the heated substrate holder. This contributes significantly to stress reduction and improved step coverage.
lobby申请人:TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
代理人:George O. Saile,Stephen B. Ackerman
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