专利名称：VOLTAGE MEMORY APPARATUS 发明人：SAKAMOTO Y,JA
申请号：US3760193D
申请日：19720222
srv公开号：US3760193A
公开日：
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摘要：A voltage-memory apparatus compris a main voltage-sweep circuit capable of holding a voltage without prominent loss of voltage and an auxiliary voltage-sweep circuit capable of boosting the held voltage. The memory apparatus is capable of memorizing a specified voltage applied to a variable capacitance diode which is provided as a tuning capacitance in tuner of a television receiver t, so that a tuned status is retained even when a broadcast wave is interrupted for a short time.
星期二英语申请人：MATSUSHITA ELECTRIC INDUSTRIAL CO,JA
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