The UC1637 is a pul width modulator circuit intended to be ud for a variety of PWM motor drive and amplifier applications requiring either uni-directional or bi-directional drive circuits. When ud to replace conventional drivers, this circuit can increa efficiency and reduce component costs for many applications. All necessary circuitry is included to generate an analog error signal and modulate two bi-directional pul train outputs in proportion to the error signal magnitude and polarity.
This monolithic device contains a sawtooth oscillator, error amplifier, and two PWM comparators with ±100mA output stages as standard features. Protection circuitry includes under-voltage lockout, pul-by-pul current limiting, and a shutdown port with a 2.5V temperature compensated threshold.
The UC1637 is characterized for operation over the full military temperature range of -55°C to +125°C, while the UC2637 and UC3637 are characterized for -25°C to +85°C and 0°C to +70°C, respectively.
Switched Mode Controller for DC Motor Drive
UC1637UC2637
UC3637
BLOCK DIAGRAM
•Single or Dual Supply Operation
•±2.5V to ±20V Input Supply Range
•
±5% Initial Oscillator Accuracy; ± 10% Over Temperature
•Pul-by-Pul Current Limiting
•Under-Voltage Lockout •
Shutdown Input with
Temperature Compensated 2.5V Threshold •Uncommitted PWM Comparators for Design Flexibility
•
Dual 100mA, Source/Sink Output Drivers
Supply Voltage (±Vs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V Output C
urrent, Source/Sink (Pins 4, 7). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA Analog Inputs (Pins 1, 2, 3, 8, 9, 10, 11 12, 13, 14, 15, 16). . . . . . . . . . . . . . . . . . . . . . . ±Vs Error Amplifier Output Current (Pin 17). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA Oscillator Charging Current (Pin 18). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2mA Power Dissipation at T A = 25°C (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW Power Dissipation at T C = 25°C (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000mW Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (Soldering, 10 Seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C Note 1:Currents are positive into, negative out of the specified terminal.
Note 2: Consult Packaging Section of Databook for thermal limitations and considerations
of package.
FEATURES
ABSOLUTE MAXIMUM RATINGS (Note 1)
DESCRIPTION
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查询UC3637DWTRG4供应商
UC1637UC2637UC3637
PACKAGE PIN FUNCTION FUNCTION PIN
+V TH 1C T 2-V TH 3A OUT 4-V S 5N/C 6+V S 7B OUT 8+B IN 9-B IN 10-A IN 11+A IN 12+C/L 13-C/L
14SHUTDOWN 15N/C 16+E/A 17-E/A
18E/A OUTPUT 19I SET 20
PLCC-20, LCC-20(TOP VIEW) Q, L Packages
ELECTRICAL CHARACTERISTICS:PARAMETER
TEST CONDITIONS
UC1637/UC2637UC3637UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Oscillator Initial Accuracy T J = 25°C (Note 6)
9.4
1010.69
1011kHz Voltage Stability V S = ±5V to ±20V, V PIN 1 = 3V, V PIN 3 = -3V
5757%Temperature Stability Over Operating Range (Note 3)0.520.52%+V TH Input Bias Current V PIN 2 = 6V -100.110
长度英文
-100.110
µA -V TH Input Bias Current V PIN 2 = 0V
-10-0.5
-10
-0.5
µA +V TH, -V TH Input Range +V S -2-V S +2+V S -2
-V S +2V
Error Amplifier Input Offt Voltage V CM = 0V 1.55 1.510mV Input Bias Current V CM = 0V 0.550.55µA Input Offt Current V CM = 0V
0.1
10.1
1µA Common Mode Range V S = ±2.5 to 20V -V S +2+V S
-V S +2+V S
V Open Loop Voltage Gain R L = 10k
75
10080
100dB Slew Rate
1515V/µS Unity Gain Bandwidth 22MHz CMRR Over Common Mode Range 7510075100dB PSRR
V S = ±2.5 to ±20V
75
110
75happy happy
110dB
CONNECTION DIAGRAM
Unless otherwi stated, the specifications apply for T A = -55°C to +125°C for the
UC1637; -25°C to +85°C for the UC2637; and 0°C to +70°C for the UC3637; +V S =+15V, -V S = - 15V, +V TH = 5V, -V TH = -5V, R T = 16.7k Ω, C T = 1500pF, T A =T J.
DIL-18 (TOP VIEW) J or N Package
SOIC-20 (TOP VIEW)
DW Package
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ELECTRICAL CHARACTERISTICS:
同声传译价格表
PARAMETERS TEST CONDITIONS UC1637/UC2637UC3637UNITS
MIN TYP MAX MIN TYP MAX
Error Amplifier (Continued)
Output Sink Current V PIN 17 = 0V-50-20-50-20mA Output Source Current V PIN 17 = 0V511511mA High Level Output Voltage1313.61313.6V Low Level Output Voltage-14.8-13-14.8-13V PWM Comparators
Input Offt Voltage V CM = 0V2020mV Input Bias Current V CM = 0V210210µA Input Hysteresis V CM = 0V1010mV Common Mode range V S = ±5V to ±20V-V S+1+V S-2-V S+1+V S-2V Current Limit
Input Offt Voltage V CM = 0V, T J = 25°C190200210180200220mV Input Offt Voltage T.C.-0.2-0.2mV/°C Input Bias Current-10-1.5-10-1.5µA Common Mode Range V S = ±2.5V to ±20V-V S+V S-3-V S+V S-3V Shutdown
新概念英语答案Shutdown Threshold(Note 4)-2.3-2.5-2.7-2.3-2.5-2.7V Hysteresis4040mV Input Bias Current V PIN 14 = +V S to -V S-10-0.5-10-0.5µA Under-Voltage Lockout
Start Threshold(Note 5) 4.15 5.0 4.15 5.0V Hysteresis0.250.25mV Total Standby Current
Supply Current8.5158.515mA Output Section
Output Low Level I SINK = 20mA-14.9-13-14.9-13V
I SINK = 100mA-14.5-13-14.5-13
Output High Level I SOURCE = 20mA1313.51313.5V
I SOURCE = 100mA1213.51213.5
Ri Time(Note 3) C L = Inf, T J = 25°C100600100600ns Fall Time(Note 3) C L = Inf, T J = 25°C100300100300ns Note 3:The parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production. Note 4:Parameter measured with respect to +V S (Pin 6).
Note 5:Parameter measured at +V S (Pin 6) with respect to -V S (Pin 5).
Note 6:R T and C T referenced to Ground.
myth什么意思FUNCTIONAL DESCRIPTION
Following is a description of each of the functional blocks shown in the Block Diagram.
Oscillator
The oscillator consists of two comparators, a charging and discharging current source, a current source t ter-minal, l SET and a flip-flop. The upper and lower threshold of the oscillator waveform is t externally by applying a voltage at pins +V TH and -V TH respectively. The +V TH ter-minal voltage is buffered internally and also applied to the l SET terminal to develop the capacitor charging current through R T. If R T is referenced to -V S as shown in Figure 1, both the threshold voltage and charging current will vary proportionally to the supply differential, and the oscil-lator frequency will remain constant. The triangle wave-form oscillators frequency and voltage amplitude is determined by the external components using the formulas given in Figure 1.
Unless otherwi stated, the specifications apply for T A = -55°C to +125°C for the UC1637; -25°C to +85°C for the UC2637; and 0°C to +70°C for the UC3637: V S = +15V, -V S = - 15V, +V TH = 5V, -V TH = -5V, R T = 16.7kΩ, C T = 1500pF, T A=T J.
3
MODULATION SCHEMES
Ca A Zero Deadtime (Equal voltage on Pin 9 and Pin 11)In this configuration, maximum holding torque or stiffness and position accuracy is achieved. However, the power in-put into the motor is inc
read. Figure 3A shows this con-figuration.
Ca B Small Deadtime (Voltage on Pin 9 > Pin 11)
A small differential voltage between Pin 9 and 11 provides the necessary time delay to reduce the chances of mo-mentary short circuit in the output stage during transi-tions, especially where power-amplifiers are ud. Refer to Figure 3B.
Ca C Incread Deadtime and Deadband Mode (Voltage on Pin 9 > Pin 11)
With the reduction of stiffness and position accuracy, the power input into the motor around the null point of the rvo loop can be reduced or eliminated by widening the window of the comparator circuit to a degree of accep-tance. Where position accuracy and mechanical stiffness is unimportant, deadband operation can be ud. This is shown in Figure 3C.
PWM Comparators
T wo comparators are provided to perform pul width modulation for each of the output drivers. Inputs are un-committed to allow maximum flexibility. The pul width of the outputs A and B is a function of the sign and ampli-tude of the error signal. A negative signal at Pin 10 and 8will lengthen t中日在线互译
he high state of output A and shorten the high state of output B. Likewi, a positive error signal re-vers the procedure. T ypically, the oscillator waveform is compared against the summation of the error signal and the level t on Pin 9 and 11.
Figure 1. Oscillator Setup
Figure 2. Comparator Biasing
Output Drivers
Each output driver is capable of both sourcing and sinking 100mA steady state and up to 500mA on a puld basis for rapid switching of either POWERFET or bipolar tran-sistors. Output levels are typically -V S + 0.2V @50mA low level and +V S - 2.0V @50mA high level.
Error Amplifier
The error amplifier consists of a high slew rate (15V/µs)op-amp with a typical 1MHz bandwidth and low output im-pedance. Depending on the ±V S supply voltage, the com-mon mode input range and the voltage output swing is within 2V of the V S supply.
Under-Voltage Lockout
An under-voltage lockout circuit holds the outputs in the low state until a minimum of 4V is reached. At this point,all internal circuitry is functional and the output drivers are enabled. If external circuitry requires a higher starting volt-age, an over-riding voltage can be programmed through the shutdown terminal as shown in Figure 4.
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Figure 3.
Modulation Schemes Showing (A) Zero Deadtime (B) Deadtime and (C) Deadband Configurations
Shutdown Comparator
The shutdown terminal may be ud for implementing
various shutdown and protection schemes. By pulling the
native
aheadterminal more than 2.5V below V IN, the output drivers will
be enabled. This can be realized using an open collector
gate or NPN transistor biad to either ground or the
公式
negative supply. Since the threshold is temperature stabi-
lized, the comparator can be ud as an accurate low
becau of you原唱voltage lockout (Figure 4) and/or delayed start as in Fig-
ure 5. In the shutdown mode the outputs are held in the
low state.
Current Limit
A latched current limit amplifier with an internal 200mV
offt is provided to allow pul-by-pul current limiting.
Differential inputs will accept common mode signals from
-V S to within 3V of the +V S supply while providing excel-
lent noi rejection. Figure 6 shows a typical current
n circuit.
Figure 4.External Under-Voltage Lockout
Figure 5.Delayed Start-Up
Figure 6.Current Limit Sensing
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