accomplishment专利名称：Method of making ultra thin body vertical
replacement gate MOSFET
发明人：John Michael Hergenrother,Pranav Kalavade
申请号：US10649140
hor怎么读
floor怎么读申请日：20030827
公开号：US06821851B2
公开日：
20041123
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专利附图：
摘要：A method of fabricating a VRG MOSFET includes the steps of: (a) forming a VRG multilayer stack; (b) forming a trench in the stack; (c) depositing an ultra thin, amorphous miconductor (&agr;-mic) layer on the sidewalls of the trench (portions of the ultra
端午节英语作文>2012北京理综thin layer on the sidewalls of the trench will ultimately form the channel or ultra thin body (UTB) of the MOSFET); (d) forming a thicker, &agr;-mic sacrificial layer on the ultra thin layer; (e) annealing the &agr;-mic layers to recrystallize them into single crystal layers; (f) lectively removing the recrystallized sacrificial layer; and (g) performing additional steps to complete the VRG MOSFET. In general, the sacrificial layer should facilitate the recrystallization of the ultra thin layer into single crystal material. In addition, the etch rate of the sacrificial layer should be sufficiently higher than that the ultra thin layer so that the sacrificial layer can be lectively removed in the prence of the ultra thin layer after recrystallization. The latter condition is illustratively satisfied by doping the sacrificial layer and by not (intentionally) doping the ultra thin layer. In accordance with one embodiment of our invention, step (g) includes filling the trench with oxide to form a thick back oxide region. In accordance with another embodiment of our invention, step (g) includes depositing a thin oxide layer (the back oxide) in the trench and then filling the remainder of the trench with a polycrystalline region
托拉斯(the back gate). VRG MOSFETs fabricated in accordance with our invention are expected to be electrostatically scalable with preci dimensional control. In addition, they can be fully depleted. Novel UTB device designs are also described.
申请人：AGERE SYSTEMS INC.
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