ADC0801/ADC0802/ADC0803/ADC0804/ADC08058-Bit µP Compatible A/D Converters
General
Description
The ADC0801,ADC0802,ADC0803,ADC0804and ADC0805are CMOS 8-bit successive approximation A/D converters that u a differential potentiometric ladder —similar to the 256R products.The converters are designed to allow operation with the NSC800and INS8080A derivative control bus with TRI-STATE ®output latches di-rectly driving the data bus.The A/Ds appear like memory locations or I/O ports to the microprocessor and no interfac-ing logic is needed.
Differential analog voltage inputs allow increasing the common-mode rejection and offtting the analog zero input voltage value.In addition,the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8bits of resolution.
Features
n Compatible with 8080µP derivatives —no interfacing logic needed -access time -135ns
n Easy interface to all microprocessors,or operates “stand alone”
n Differential analog voltage inputs
n Logic inputs and outputs meet both MOS and TTL voltage level specifications
n Works with 2.5V (LM336)voltage reference n On-chip clock generator
n 0V to 5V analog input voltage range with single 5V supply
n No zero adjust required
n 0.3"standard width 20-pin DIP packageadobe systems incorporated
n 20-pin molded chip carrier or small outline package n Operates ratiometrically or with 5V DC ,2.5V DC ,or analog span adjusted voltage reference
Key Specifications
n Resolution 8bits
n Total error
±1⁄4
LSB,±1⁄2
LSB and ±1LSB
n Conversion time
100µs
Connection Diagram
Ordering Information
TEMP RANGE
0˚C TO 70˚C 0˚C TO 70˚C
−40˚C TO +85˚C ±1⁄4
Bit Adjusted ADC0801LCN ERROR
±1⁄2Bit Unadjusted ADC0802LCWM ADC0802LCN ±1⁄2Bit Adjusted ADC0803LCN
±1Bit Unadjusted
ADC0804LCWM ADC0804LCN ADC0805LCN/ADC0804LCJ
PACKAGE OUTLINE
M20B —Small
Outline
N20A —Molded DIP
TRI-STATE ®is a registered trademark of National Semiconductor Corp.Z-80®is a registered trademark of Zilog Corp.
ADC080X
Dual-In-Line and Small Outline (SO)Packages
DS005671-30
See Ordering Information
November 1999
ADC0801/ADC0802/ADC0803/ADC0804/ADC08058-Bit µP Compatible A/D Converters
©1999National Semiconductor Corporation
Typical
Applications
Error Specification (Includes Full-Scale,
Zero Error,and Non-Linearity)Part Full-V REF /2=2.500V DC V REF /2=No Connection Number Scale (No Adjustments)
(No Adjustments)
Adjusted
ADC0801±1⁄4LSB
ADC0802±1⁄2LSB
ADC0803±1⁄2LSB
ADC0804±1LSB
ADC0805
±1LSB
DS005671-1
8080Interface
dr官网
DS005671-31
A D C 0801/A D C 0802/A D C 0803/A D C 0804/A D C 0805
2
Absolute Maximum Ratings
(Notes1,2)
If Military/Aerospace specified devices are required, plea contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage(V CC)(Note3) 6.5V Voltage
Logic Control Inputs−0.3V to+18V At Other Input and Outputs−0.3V to(V CC+0.3V) Lead Temp.(Soldering,10conds)
Dual-In-Line Package(plastic)260˚C Dual-In-Line Package(ceramic)300˚C Surface Mount Package
Vapor Pha(60conds)215˚C
Infrared(15conds)220˚C Storage Temperature Range−65˚C to+150˚C Package Dissipation at T A=25˚C875mW ESD Susceptibility(Note10)800V
Operating Ratings(Notes1,2)
Temperature Range T MIN≤T A≤T MAX ADC0804LCJ−40˚C≤T A≤+85˚C ADC0801/02/03/05LCN−40˚C≤T A≤+85˚C ADC0804LCN0˚C≤T A≤+70˚C ADC0802/04LCWM0˚C≤T A≤+70˚C Range of V CC 4.5V DC to6.3V DC
Electrical Characteristics
The following specifications apply for V CC=5V DC,T MIN≤T A≤T MAX and f CLK=640kHz unless otherwi specified.
Parameter Conditions Min Typ Max Units
ADC0801:Total Adjusted Error(Note8)With Full-Scale Adj.±1⁄4LSB
(See Section2.5.2)
ADC0802:Total Unadjusted Error(Note8)V REF/2=2.500V DC±1⁄2LSB
ADC0803:Total Adjusted Error(Note8)With Full-Scale Adj.±1⁄2LSB
(See Section2.5.2)
ADC0804:Total Unadjusted Error(Note8)V REF/2=2.500V DC±1LSB
ADC0805:Total Unadjusted Error(Note8)V REF/2-No Connection±1LSB
V REF/2Input Resistance(Pin9)ADC0801/02/03/05 2.58.0kΩ
ADC0804(Note9)0.75 1.1kΩ
Analog Input Voltage Range(Note4)V(+)or V(−)Gnd–0.05V CC+0.05V DC
DC Common-Mode Error Over Analog Input Voltage±1/16±1⁄8LSB
Range
Power Supply Sensitivity V CC=5V DC±10%Over±1/16±1⁄8LSB
Allowed V IN(+)and V IN(−)
Voltage Range(Note4)
AC Electrical Characteristics
The following specifications apply for V CC=5V DC and T MIN≤T A≤T MAX unless otherwi specified.
Symbol Parameter Conditions Min Typ Max Units商务英语培训班
T C Conversion Time f CLK=640kHz(Note6)103114µs
T C Conversion Time(Notes5,6)66731/f CLK
f CLK Clock Frequency V CC=5V,(Note5)1006401460kHz
Clock Duty Cycle4060%怎样才能学好英语
CR Conversion Rate in Free-Running INTR tied to WR with87709708conv/s Mode CS=0V DC,f CLK=640kHz
t W(WR)L Width of WR Input(Start Pul Width)CS=0V DC(Note7)100ns
t ACC Access Time(Delay from Falling C L=100pF135200ns Edge of RD to Output Data Valid)
t1H,t0H TRI-STATE Control(Delay C L=10pF,R L=10k125200ns from Rising Edge of RD to(See TRI-STATE Test
Hi-Z State)Circuits)
t WI,t RI Delay from Falling Edge300450ns of WR or RD to Ret of INTR
C IN Input Capacitance of Logic57.5pF
Control Inputs
ADC0801/ADC0802/ADC0803/ADC0804/ADC0805
3
AC Electrical Characteristics
(Continued)
The following specifications apply for V CC =5V DC and T MIN ≤T A ≤T MAX unless otherwi specified.
Symbol Parameter
Conditions
Min
Typ Max Units C OUT
TRI-STATE Output 5
7.5
pF
Capacitance (Data Buffers)
CONTROL INPUTS [Note:CLK IN (Pin 4)is the input of a Schmitt trigger circuit and is therefore specified parately]V IN (1)Logical “1”Input Voltage V CC =5.25V DC 2.015
V DC (Except Pin 4CLK IN)
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V IN (0)Logical “0”Input Voltage V CC =4.75V DC
0.8
V DC (Except Pin 4CLK IN)I IN (1)Logical “1”Input Current V IN =5V DC
0.005
1
µA DC (All Inputs)
I IN (0)
Logical “0”Input Current V IN =0V DC
−1
−0.005
weekends是什么意思
µA DC
(All Inputs)
CLOCK IN AND CLOCK R V T +CLK IN (Pin 4)Positive Going 2.7
3.1
3.5
V DC Threshold Voltage V T −CLK IN (Pin 4)Negative 1.5
1.8
2.1
V DC Going Threshold Voltage V H
CLK IN (Pin 4)Hysteresis 0.6
1.3
2.0
专业学位与学术学位的区别V DC (V T +)−(V T −)
V OUT (0)Logical “0”CLK R Output I O =360µA 0.4
V DC Voltage
V CC =4.75V DC V OUT (1)
Logical “1”CLK R Output I O =−360µA 2.4
nancy travis
V DC
Voltage
V CC =4.75V DC
DATA OUTPUTS AND INTR V OUT (0)
Logical “0”Output Voltage Data Outputs I OUT =1.6mA,V CC =4.75V DC 0.4V DC INTR Output
I OUT =1.0mA,V CC =4.75V DC 0.4
V DC V OUT (1)Logical “1”Output Voltage I O =−360µA,V CC =4.75V DC 2.4V DC V OUT (1)Logical “1”Output Voltage I O =−10µA,V CC =4.75V DC 4.5V DC I OUT TRI-STATE Disabled Output V OUT =0V DC −3
µA DC Leakage (All Data Buffers)
V OUT =5V DC
3
µA DC I SOURCE V OUT Short to Gnd,T A =25˚C 4.56mA DC I SINK
V OUT Short to V CC ,T A =25˚C
9.0
out of nowhere16
mA DC
POWER SUPPLY I CC
Supply Current (Includes f CLK =640kHz,
Ladder Current)
V REF /2=NC,T A =25˚C and CS =5V
ADC0801/02/03/04LCJ/05 1.1 1.8mA ADC0804LCN/LCWM
1.9
2.5
mA
Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions.
Note 2:All voltages are measured with respect to Gnd,unless otherwi specified.The parate A Gnd point should always be wired to the D Gnd.Note 3:A zener diode exists,internally,from V CC to Gnd and has a typical breakdown voltage of 7V DC .
Note 4:For V IN (−)≥V IN (+)the digital output code will be 00000000.Two on-chip diodes are tied to each analog input (e block diagram)which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the V CC supply.Be careful,during testing at low V CC levels (4.5V),as high level analog inputs (5V)can cau this input diode to conduct–especially at elevated temperatures,and cau errors for analog inputs near full-scale.The spec allows 50mV forward bias of either diode.This means that as long as the analog V IN does not exceed the supply voltage by more than 50mV,the output code will be correct.To achieve an absolute 0V DC to 5V DC i
nput voltage range will therefore require a minimum supply voltage of 4.950V DC over temperature variations,initial tolerance and loading.
Note 5:Accuracy is guaranteed at f CLK =640kHz.At higher clock frequencies accuracy can degrade.For lower clock frequencies,the duty cycle limits can be ex-tended so long as the minimum clock high time interval or minimum clock low time interval is no less than 275ns.
Note 6:With an asynchronous start pul,up to 8clock periods may be required before the internal clock phas are proper to start the conversion process.The start request is internally latched,e Figure 4and ction 2.0.
A D C 0801/A D C 0802/A D C 0803/A D C 0804/A D C 0805
4
AC Electrical Characteristics
(Continued)
Note7:The CS input is assumed to bracket the WR strobe input and therefore timing is dependent on the WR pul width.An arbitrarily wide pul width will hold the converter in a ret mode and the start of conversion is initiated by the low to high transition of the WR pul(e timing diagrams).
Note8:None of the A/Ds requires a zero adjust(e ction2.5.1).To obtain zero code at other analog input voltages e ction2.5and Figure7.
Note9:The V REF/2pin is the center point of a two-resistor divider connected from V CC to ground.In all versions of the ADC0801,ADC0802,ADC0803,and ADC0805,and in the ADC0804LCJ,each resistor is typically16kΩ.In all versions of the ADC0804except the ADC0804LCJ,each resistor is typically2.2kΩ. Note10:Human body model,100pF discharged through a1.5kΩresistor.
Typical Performance Characteristics
Logic Input Threshold Voltage vs.Supply Voltage
DS005671-38Delay From Falling Edge of
RD to Output Data Valid
vs.Load Capacitance
DS005671-39
CLK IN Schmitt Trip Levels
vs.Supply Voltage
DS005671-40
f CLK vs.Clock Capacitor
DS005671-41Full-Scale Error vs
Conversion Time
DS005671-42
Effect of Unadjusted Offt Error
vs.V REF/2Voltage
DS005671-43
Output Current vs
Temperature
DS005671-44Power Supply Current
vs Temperature(Note9)
DS005671-45
Linearity Error at Low
V REF/2Voltages
DS005671-46
ADC0801/ADC0802/ADC0803/ADC0804/ADC0805
5
TRI-STATE Test Circuits
and Waveforms
Timing Diagrams
(All timing is measured from the 50%voltage points)
t 1H
DS005671-47
t 1H ,C L =10pF
DS005671-49
t 0H ,C L =10pF
英文简历字体DS005671-50
t r =20ns
DS005671-51
A D C 0801/A D C 0802/A D C 0803/A D C 0804/A D C 0805
6
