专利名称：Process for manufacturing a wiring substrate
发明人：Hajime Saiki,Atsuhiko Sugimoto,Mikiya
Sakurai
申请号：US10989515
申请日：20041117
公开号：US07202156B2
公开日：
20070410
专利内容由知识产权出版社提供
专利附图：
摘要：A process for manufacturing a wiring substrate, comprising: a step of forming an insulating resin layer containing an inorganic filler over a wiring layer formed on at least one surface of an insulating substrate; a step of forming a thin copper film layer by
roughening a surface of the insulating resin layer and plating the same electrolessly with copper; a step of forming an insulating film over the thin copper film layer; a step of forming plated resists profiling a pattern by exposing and developing the insulating film with the pattern; and a step of forming wiring pattern layers by an electrolytic copper plating on a surface of the insulating resin layer having the plated resists formed thereon, wherein at least one of the plated resists has a width of less than 20 μm, and the plated resists include adjoining plated resists in which a clearance between said adjoining plated resists has a width of less than 20 μm.
申请人：Hajime Saiki,Atsuhiko Sugimoto,Mikiya Sakurai
地址：Nagoya JP,Nagoya JP,Nagoya JP
国籍：JP,JP,JP
代理机构：Stites & Harbison PLLC
代理人：Ross F. Hunt, Jr.
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