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IP1845A SERIES
TOP VIEW
J Package – 8 Pin Ceramic DIP N Package – 8 Pin Plastic DIP
D-8 Package – 8 Pin Plastic (150) SOIC
英语的形容词1
234
8765
COMP V REF GROUND
OUTPUT R T /C T V CC I SENSE V FB TOP VIEW
D-14 Package – 14 Pin Plastic (150) SOIC COMP V REF GROUND OUTPUT 12
34
POWER GROUND
56
7
141312111098
N/C
R T /C T I SENSE N/C
N/C
N/C V CC V FB V C CURRENT MODE REGULATING PULSE WIDTH MODULATORS
FEATURES
•Guaranteed ±1% reference voltage tolerance •Accurate oscillator discharge current •Guaranteed ±10% frequency tolerance •Low start–up current (<500 m A)
•Under voltage lockout with hysteresis
•
Output state completely defined for all supply and input conditions
•Interchangeable with IP and UC1844/5 ries for improved operation
•500kHz Oscillator operation 250kHz Output operation
+30V Self limiting
±1A 5µJ
–0.3V to +V CC
10mA 1W 10mW/°C 725mW 7.25mW/°C
2W 16mW/°C –65 to 150°C +300°C
ABSOLUTE MAXIMUM RATINGS (T ca = 25°C unless otherwi stated)
V CC Supply Voltage
(low impedance source)(I CC < 30mA)I O
Output Current Output Energy (capacitive load)Analog Inputs
(pins 2 and 3)Error Amp Output Sink Current P D Power Dissipation
T amb = 25°C J, N Packages Derate @ T amb > 50°C P D Power Dissipation
T ca = 25°C D Package Derate @ T amb > 50°C P D Power Dissipation
T ca = 25°C
J, N Packages
Derate @ T ca > 25°C
T STG Storage Temperature Range T L
Lead Temperature
(soldering, 10 conds)
Part J–Pack N–Pack
D–8D–14Temp.Number 8 Pin 8 Pin 8 Pin 14 Pin Range IP1844A -55 to +125°C IP2844A -25 to +85°C IP3844A 0 to +70°C IP1845A -55 to +125°C IP2845A -25 to +85°C IP3845A
0 to +70°C
Order Information
Note:
To order, add the package identifier to the
IP1844AD–14IP3845AJ
健康上网专家LAB
IP1845A SERIES
V CC Supply Voltage 1I O
Output Current Analog Inputs
(pins 2 and 3)
Error Amp Output Sink Current IP1844A , IP1845A Operating Ambient Temperature Range
IP2844A , IP2845A IP3844A , IP3845A
≤ 30V 0 to ±200mA –0.3V to 3V 0 to 2mA –55 to 125°C –25 to 85°C 0 to 70°C
敕勒歌教案
Notes:
1.
Lower limit t by under voltage lockout specification.
RECOMMENDED OPERATING CONDITIONS
* 1844A and 1845A ries only.
Values in brackets are for IP1845 ries.3.6V
ERROR AMP
OSCILLATOR
2R R
1V
R
S PWM LATCH CURRENT SENSE
COMPARATOR
16V (8.4V)
6V (0.5V)
2.5V
UNDER–VOLTAGE
LOCKOUT
ENABLE
REFERENCE REGULATOR
5V INTERNAL BIAS
34V
REG
R
S V STATUS LATCH
REF
PIN NUMBERS
1st Number 2nd Number – N, J and 8 Pin D Packages – 14 Pin D Package.
C OMP G ND
V CC我爱你的句子
I SENSE
V FB /C R T
T OUTPUT
POW ER GROUND
V REF
V C
3/5
5/9
7/12
2/31/1
4/7
6/10
7/11
5/8
8/14
TOGGLE FLIP FLOP *
T
Q DESCRIPTION
The IP1844A/IP1845A ries of switching regulator control circuits contain all the functions necessary to implement off-line, current mode switching regulators, using a minimum number of external parts. Functions included are voltage reference, error amplifier, current n comparator, o
scillator, totem-pole output driver and under-voltage lockout circuitry.
In addition the IP1844A and IP1845A ries of devices have a toggle flip-flop which blanks the output on every cond clock pul, thereby ensuring that the duty cycle never exceeds 50%. For applications requiring more flexible control, all devices feature an on-chip trimmed oscillator discharge current, allowing accurate control to maximum-duty-cycle by lection of timing components. This can be beneficial even when using the IP1844A or IP1845A ries, as it allows optimum safety margins to be designed into the application.
Although pin compatible with the standard IP1844/5 parts the devices offer improved performance in veral areas. They also offer tighter specification and improved performance over the IP and UC1844/5 ries, whilst retaining complete compatibility.
BLOCK DIAGRAM
LAB
IP1845A SERIES
NOTES
1.Test Conditions unless otherwi stated:
V CC = 15V* , R T = 10k Ω, C T = 3.3nF , f = 52kHz.
*Adjust V CC above start threshold before tting at required level.2.Output frequency is half the oscillator frequency.
4.90
5.00 5.106206250.2
0.44.82
5.18
505
儿童语言发育迟缓
2530
80
160
4752570.21
51.7
7.88.38.879
2.42
2.50 2.58–0.3
–2
65900.71607026–0.5–0.85
60.7
1.1
4.95
5.00 5.056206250.2
0.44.90
5.10
505
2530
80
1604752570.21
51.7
7.88.38.879
2.45
2.50 2.55–0.3
–1
65900.71607026–0.5–0.85
60.7
1.1
IP1844A , IP1845A IP3844A
IP2844A , IP2845A IP3845A Parameter
Test Conditions 1Min.Typ.Max.Min.Typ.Max.Units Output Voltage Input Regulation Output Regulation Temperature Stability Total Output Variation Output Noi Voltage Long Term Stability Output Short Circuit Current Frequency Voltage Stability Temperature Stability Amplitude Discharge Current
Input Voltage Input Bias Current Open Loop Voltage Gain
Unity Gain Bandwidth Supply Voltage Rejection
Output Sink Current Output Source Current V OUT High V OUT Low
I O = 1mA T J = 25°C
V CC = 12V to 25V I O = 1mA to 20mA
Line, Load, Temp f = 10Hz to 10kHz
T J = 25°C
侯赛因T J = 125°C @ 1000Hrs V REF = 0
T J = 25°C (Note 2)
V CC = 12V to 25V ∆T A = Min to Max V PIN4Peak to Peak T J = 25°C ∆T A = Min to Max
V PIN1= 2.5V
V O = 2V to 4V V CC = 12V to 25V V PIN2= 2.7V V PIN1= 1.1V V PIN2= 2.3V V PIN1= 5V V PIN2= 2.3V R L = 15k ΩV PIN2= 2.7V
R L = 15k Ω
V mV mV °C V µV
mV mA
kHz %%V
mA
V µA dB MHz dB mA V
ELECTRICAL CHARACTERISTICS (Over Full Operating Temperature Range unless otherwi stated)
REFERENCE SECTION举世闻名的近义词
OSCILLATOR SECTION
ERROR AMP SECTION
All specifications apply over the full operating temperature range unless otherwi stated.(See Ordering Information for further details).
LAB
IP1845A SERIES
IP1844A , IP1845A IP3844A
IP2844A , IP2845A IP3845A Parameter
Test Conditions 1
Min.Typ.Max.Min.Typ.
Max.Units 2.853 3.150.91 1.1
60
70–2–101503000.10.41.5
立志的名言警句2.2
1313.512
13.550150501500.7 1.114.51617.57.88.498.51011.57
7.68.20.30.5111514173034404648
500
2.853
3.150.91 1.1
60
70–2–10150
3000.10.41.5
2.2131
3.512
13.550150501500.7
1.11516177.88.49910117
7.68.20.30.5111514
1730344047
48
500
Gain
Maximum Input Signal Supply Voltage Rejection Input Bias Current Delay to Output
Output Low Level Output High Level Ri Time Fall Time UVLO Saturation Upper Threshold (V CC )
Lower Threshold (V CC )
Start–up Current Operating Supply Current
V CC Zener Voltage Maximum Duty Cycle Minimum Duty Cycle
See Notes 2,3V PIN1= 5V (Note 2)
V C = 12V to 25V
I SINK = 20mA I SINK = 200mA I SOURCE = 20mA I SOURCE = 200mA C L = 1nF C L = 1nF V CC = 6V I L = 1mA
IP1844A Series IP1845A Series IP1844A Series IP1845A Series
V PIN2= 0V IP1844A Series V PIN3= 0V IP1845A Series
I CC = 25mA
V/V V dB
µA ns
V V
ns V
V V
mA mA V
%
NOTES
ELECTRICAL CHARACTERISTICS (Over Full Operating Temperature Range unless otherwi stated)
CURRENT SENSE SECTION
OUTPUT SECTION
UNDER–VOLTAGE LOCKOUT SECTION
TOTAL STANDBY CURRENT
PWM SECTION
1.Test Conditions unless otherwi stated:
V CC = 15V* , R T = 10k Ω, C T = 3.3nF , f = 52kHz.*Adjust V CC above start threshold before tting at required level.All specifications apply over the full operating temperature range unless othe
rwi stated.
(See Ordering Information for further details).
2.Parameter measured at trip point of latch with V PIN2= 0V
3.Gain defined as:
∆V PIN1A =
∆V PIN30 ≤V PIN3≤0.8
For R T > 5k Ω,
1.8Resultant frequency f ≈
(R T C T )
.0063 R T – 2.3
.0063 – 4
( )
t c ≈0.55 R T C T
t d ≈R T C T R n
1
Resultant frequency f =
(t c + t d )
Oscillator timing capacitor C T is charged by V REF through R T and discharged by an internal current source.
During the discharge time, the internal clock signal blanks the output to the low state. Selection of R T and
C T therefore determines both oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulae:
LAB
IP1845A SERIES
Open–Loop Laboratory Test Fixture
APPLICATIONS INFORMATION
High peak current associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected clo to pin 5 in a single point ground. The transistor and 5K potentiometer are ud to sample the oscillator wave form and apply an adjustable ramp to pin 3.
0.1µF
1k Ω1kW
1k Ω
ERROR AMP
ADJUST
4.7k Ω
5k Ω
ADJUST
4.7k Ω
100k Ω
2N2222I SENSE R T
C T
0.1µF
V REF
V CC
OUTPUT
GROUND
1245
7836I SENSE V REF V CC O/P GND COMP V FB R T /C T
Oscillator Waveforms and Maximum Duty Cycle
8
4
5
GND
R T
C T
REF
V R T C
T
PIN4V (V for 14 pin D package)PIN7INTERNAL CLOCK
INTERNAL CLOCK
OUTPUT – Max. Duty Cycle
PIN6V (V for 14 pin D package)PIN10
PIN4
V (V for 14 pin D package)PIN7OUTPUT – Max. Duty Cycle
PIN6V (V for 14 pin D package)PIN10
LARGE C T
SMALL R T
LARGE R T SMALL C T
