Read level grouping to increa flash performance

更新时间:2023-06-01 05:40:35 阅读: 评论:0

专利名称:Read level grouping to increa flash
performance
发明人:セイハン カラクラック,アンソニー デウェン ウェザーズ,リチャード デイヴィッド バント
申请号:JP2016054914开放式提问
申请日:20160318
公开号:JP6218195B2
公开日:
东西经分界线20171025
专利内容由知识产权出版社提供
梦见老同事摘要:A computer implemented method 1400 (and a data storage system such as a Solid State Disc (SSD) consisting of a plurality of Multi-Level Cell (MLC) NAND FLASH memory devices, and a controller coupled to the flash memory) the method comprising of reading a first sample of wordlines in a particular block of memory 1402, each associated with a wordline identifier (or address), and to be read multiple times at different read level voltages to produce an associated error count, and generating a read table of error counts 1402 to store an error count for each combination of wordline and respective read level voltage ud to read the wordlines. A plurality of wordline groups 1404 are generated bad on the table of error counts, with each group associating a different read level offt voltage (bias voltage) with a plurality of wordline address. The storage device is configured to read memory cells using a read level offt voltage of a generated offt wordline group associated with a wordline address of the memory cells to be read 1406. After a predetermined point in a life cycle of a respective memory block, the table is regenerated and plurality of offt wordline groups are regenerated bad the regenerated table of error counts 1408, 1410. A plurality of wordline groups
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may be bad on the wordline identifiers (or address) ud to index the table of error counts, the groups, for the purpo of reading, associating a different read level with a plurality of wordlines. The wordline groups may be bad on an initial division of wordlines corresponding to the wordline identifiers each group comprising of a concutively grouped portion of the corresponding wordlines pairs with a corresponding read level voltage, whilst the pairing are lected for an overall lowest possible error count. The table of error counts may be regenerated after a certain point in a life cycle of a memory block, using a cond sample of wordlines, and bad on for example reaching a pre-t number of program/era cycles 1410. Using log likelihood LLR methodology, the regeneration of error count tables may include generating a plurality of reliability values (both negative and positive) and identifying a calibrated voltage corresponding to the zero crossing point for the cond sample of wordlines.
申请人:エイチジーエスティーネザーランドビーブイ
地址:オランダ国 1101 シーエム アムステルダム,ルナ アレナ,ヘリケルベルグヴェヘ 238
育儿嫂合同国籍:NL
代理人:特許業務法人平木国際特許事務所
蝴蝶谷网>黄酒泡阿胶的禁忌
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