Ret and clock circuit for providing valid power

更新时间:2023-05-25 01:56:32 阅读: 评论:0

专利名称:Ret and clock circuit for providing valid
power up ret signal prior to distribution of
clock signal
黄忠是怎么死的
发明人:Matthew H. Childs
贻厥孙谋申请号:US08/521213现代博古架
申请日:19950830
公开号:US05510741A
公开日:
尤克里里曲子
生活水准
描写绿的成语19960423
专利内容由知识产权出版社提供
摘要:A ret and clock circuit for providing a valid power-up ret signal prior to distribution of a clock signal includes power nsing circuitry, a clock generator and a ret generator. The power nsing circuitry monitors the power supply voltage and generates a power-up signal which is asrted when it has rin above a predetermined value. The power nsing circuitry also receives a clock signal and, in accordance with the power-up and clock signals, provides a number of power status signals. One of the power status signals is asrted in respon to asrtion of the power-up signal, while another is asrted in respon to reception of a group of clock signal puls. The clock generator, in respon to asrtion of the first power status signal, provides the clock signal. The ret generator, in accordance with the power status signals and clock signal, provides a number of ret signals each one of which is initially asrted prior to the providing of the clock signal by the clock signal generator. One of the ret signals is de-asrted in respon to reception of another group of clock signal puls, while another is de-asrted in respon to reception of still another group of clock signal puls.细雨飘飘
申请人:NATIONAL SEMICONDUCTOR CORPORATION橘子的拼音
代理机构:Limbach & Limbach 更多信息请下载全文后查看

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