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AD574A–SPECIFICATIONS
AD574AJ AD574AK AD574AL Model Min Typ
Max Min Typ
Max Min Typ
Max Units RESOLUTION
121212Bits LINEARITY ERROR @ +25°C ±1±1/2
±1/2
掩护的反义词LSB T MIN to T MAX
±1
±1/2
±1/2
LSB
不甘心DIFFERENTIAL LINEARITY ERROR (Minimum Resolution for Which No Missing Codes are Guaranteed)T MIN to T MAX 11
12
12
Bits UNIPOLAR OFFSET (Adjustable to Zero)±2±1±1LSB BIPOLAR OFFSET (Adjustable to Zero)
±4
±4
±2
LSB
FULL-SCALE CALIBRATION ERROR
(With Fixed 50 Ω Resistor from REF OUT to REF IN)(Adjustable to Zero)0.25
0.250.125% of FS TEMPERATURE RANGE 0
+70
+70
+70
°C
TEMPERATURE COEFFICIENTS (Using Internal Reference)T MIN to T MAX
Unipolar Offt ±2 (10)
±1 (5)±1 (5)LSB (ppm/°C)Bipolar Offt
±2 (10)±1 (5)±1 (5)LSB (ppm/°C)Full-Scale Calibration ±9 (50)±5 (27)±2 (10)LSB (ppm/°C)
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration V CC = 15 V ± 1.5 V or 12 V ± 0.6 V ±2±1±1LSB V LOGIC = 5 V ± 0.5 V
±1/2±1/2±1/2LSB V EE = –15 V ± 1.5 V or –12 V ± 0.6 V ±2±1±1LSB
ANALOG INPUT Input Ranges Bipolar
–5+5–5+5–5+5Volts –10+10–10+10–10+10Volts Unipolar 0+100+100+10Volts 0+200+200+20Volts Input Impedance 10 Volt Span 357357357k Ω20 Volt Span
6
10
14
6
10
14
6
10
14
k Ω
DIGITAL CHARACTERISTICS 1 (T MIN –T MAX )Inputs 2 (CE, CS , R/C , A 0)Logic “1” Voltage +2.0+5.5+2.0+5.5+2.0+5.5Volts Logic “0” Voltage –0.5+0.8–0.5+0.8–0.5+0.8Volts Current –20
+20–20
+20–20
+20
µA Capacitance
5
5
5
pF Output (DB11–DB0, STS)
时而时而造句Logic “1” Voltage (I SOURCE ≤ 500 µA)+2.4+2.4
+2.4
Volts Logic “0” Voltage (I SINK ≤ 1.6 mA)+0.4+0.4+0.4Volts Leakage (DB11–DB0, High-Z State)–20
+20
–20
+20
–20
+20
µA Capacitance 5
5
5
pF
POWER SUPPLIES Operating Range V LOGIC +4.5+5.5+4.5+5.5+4.5+5.5Volts V CC +11.4+16.5+11.4+16.5+11.4+16.5Volts V EE
–11.4
–16.5–11.4
–16.5–11.4
–16.5Volts Operating Current I LOGIC 304030403040mA I CC 252525mA I EE 183018301830mA POWER DISSIPATION
390
725390
725390
725mW INTERNAL REFERENCE VOLTAGE
9.98
10.0
10.029.98
10.0
10.029.99
10.0
10.01Volts Output Current (Available for External Loads)3
1.5
1.5
1.5
mA
(External Load Should not Change During Conversion)PACKAGE OPTIONS 4Ceramic (D-28)AD574ASD AD574AKD AD574ALD Plastic (N-28)AD574AJN AD574AKN AD574ALN
PLCC (P-28A)AD574AJP AD574AKP LCC (E-28A)
AD574AJE AD574AKE
NOTES
1
Detailed Timing Specifications appear in the Timing Section.2
12/8 Input is not TTL-compatible and must be hard wired to V LOGIC or Digital Common.3
The reference should be buffered for operation on ±12 V supplies.4
D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.Specifications subject to change without notice.
(@ +25؇C with V CC = +15 V or +12 V, V LOGIC = +5 V, V EE = –15 V or –12 V unless otherwi noted)
REV. B
–2–/
AD574AS AD574AT AD574AU
Model Min Typ Max Min Typ Max Min Typ Max Units RESOLUTION121212Bits LINEARITY ERROR @ +25°C±1±1/2±1/2LSB
T MIN to T MAX±1±1±1LSB DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
T MIN to T MAX111212Bits UNIPOLAR OFFSET (Adjustable to Zero)±2±1±1LSB BIPOLAR OFFSET (Adjustable to Zero)±4±4±2LSB
FULL-SCALE CALIBRATION ERROR
(With Fixed 50 Ω Resistor from REF OUT to REF IN)
(Adjustable to Zero)0.250.250.125% of FS TEMPERATURE RANGE–55+125–55+125–55+125°C TEMPERATURE COEFFICIENTS
(Using Internal Reference)
(T MIN to T MAX)
Unipolar Offt±2 (5)±1 (2.5)±1 (2.5)LSB (ppm/°C) Bipolar Offt±4 (10)±2 (5)±1 (2.5)LSB (ppm/°C) Full-Scale Calibration±20 (50)±10 (25)±5 (12.5)LSB (ppm/°C) POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V CC = 15 V ± 1.5 V or 12 V ± 0.6 V±2±1±1LSB V LOGIC = 5 V ± 0.5 V±1/2±1/2±1/2LSB V EE = –15 V ± 1.5 V or –12 V ± 0.6 V±2±1±1LSB ANALOG INPUT
Input Ranges
Bipolar–5+5–5+5–5+5Volts
–10+10–10+10–10+10Volts Unipolar0+100+100+10Volts
0+200+200+20Volts
Input Impedance
10 Volt Span357357357kΩ
20 Volt Span610146101461014kΩ
世界最大航母
DIGITAL CHARACTERISTICS1 (T MIN–T MAX)
Inputs2 (CE, CS, R/C, A0)
Logic “1” Voltage+2.0+5.5+2.0+5.5+2.0+5.5Volts Logic “0” Voltage–0.5+0.8–0.5+0.8–0.5+0.8Volts Current–20+20–20+20–20+20µA Capacitance555pF
Output (DB11–DB0, STS)
Logic “1” Voltage (I SOURCE≤ 500 µA)+2.4+2.4+2.4Volts Logic “0” Voltage (I SINK≤ 1.6 mA)+0.4+0.4+0.4Volts Leakage (DB11–DB0, High-Z State)–20+20–20+20–20+20µA Capacitance555pF
POWER SUPPLIES
Operating Range
sims4秘籍V LOGIC+4.5+5.5+4.5+5.5+4.5+5.5Volts V CC+11.4+16.5+11.4+16.5+11.4+16.5Volts V EE–11.4–16.5–11.4–16.5–11.4–16.5Volts Operating Current
I LOGIC304030403040mA
I CC252525mA
I EE183018301830mA
POWER DISSIPATION390725390725390725mW INTERNAL REFERENCE VOLTAGE9.9810.010.029.9810.010.029.9910.010.01Volts
Output Current (Available for External Loads)3 1.5 1.5 1.5mA (External Load Should not Change During Conversion)
PACKAGE OPTION4
Ceramic (D-28)AD574ASD AD574ATD AD574AUD
NOTES
1Detailed Timing Specifications appear in the Timing Section.
212/8 Input is not TTL-compatible and must be hard wired to V
LOGIC or Digital Common.
3The reference should be buffered for operation on ±12 V supplies.
4D = Ceramic DIP.
Specifications subject to change without notice.
AD574A
REV. B–3–
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AD574A
REV. B
–4–ORDERING GUIDE
Resolution
Max
Temperature Linearity Error No Missing Codes Full Scale
Model
1
Range
Max (T MIN to T MAX )(T MIN to T MAX )T.C. (ppm/°C)AD574AJ(X)0°C to +70°C ±1 LSB 11 Bits 50.0AD574AK(X)0°C to +70°C ±1/2 LSB 12 Bits 27.0AD574AL(X)0°C to +70°C ±1/2 LSB 12 Bits 10.0AD574AS(X)2–55°C to +125°C ±1 LSB 11 Bits 50.0AD574AT(X)2–55°C to +125°C ±1 LSB 12 Bits 25.0AD574AU(X)2
–55°C to +125°C
±1 LSB
瘦身塑形
12 Bits
12.5
NOTES 1
X = Package designator. Available packages are: D (D-28) for all grades. E (E-28A) for J and K grades and /883B procesd S, T and U grades. N (N-28) for J, K, and L grades. P (P-28A) for PLCC in J, K grades. Example: AD574AKN is K grade in plastic DIP.2
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to Analog Devices Military Products Databook.
DIGITAL COMMON
DC
+5V SUPPLY
V LOGIC
DATA MODE SELECT
12/8
STATUS STS DB11MSB DB10DB9DB8DB7DB6DB5DB4
DB3DB2DB1DB0LSB
DIGITAL DATA OUTPUTS
CHIP SELECT
CS
BYTE ADDRESS/SHORT CYCLE
A O
READ/CONVERT
R/C
CHIP ENABLE
CE
+12/+15V SUPPLY
V CC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
V EE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10V IN
20V SPAN INPUT 20V IN
AD574A Block Diagram and Pin Configuration
ABSOLUTE MAXIMUM RATINGS*
(Specifications apply to all grades, except where noted)
V CC to Digital Common . . . . . . . . . . . . . . . . . .0 V to +16.5 V V EE to Digital Common . . . . . . . . . . . . . . . . . . .0 V to –16.5 V V LOGIC to Digital Common . . . . . . . . . . . . . . . . . .0 V to +7 V Analog Common to Digital Common . . . . . . . . . . . . . . .±1 V Control Inputs (CE, CS , A O 12/8, R/C ) to
Digital Common . . . . . . . . . . . . . .–0.5 V to V LOGIC + 0.5 V Analog Inputs (REF IN, BIP OFF, 10 V IN ) to
Analog Common . . . . . . . . . . . . . . . . . . . . . . . . .V EE to V CC 20 V IN to Analog Common . . . . . . . . . . . . . . . . . . . . . .±24 V REF OUT . . . . . . . . . . . . . . . . . .Indefinite Short to Common
Momentary Short to V CC
Chip Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .825 mW Lead Temperature (Soldering, 10 c). . . . . . . . . . . . .+300°C Storage Temperature (Ceramic) . . . . . . . . . .–65°C to +150°C (Plastic) . . . . . . . . . . . . . . . . . . . . . . . . . . .–25°C to +100°C
*Stress above tho listed under “Absolute Maximum Ratings” may cau permanent damage to the device. This is a stress rating only and functional operation of the device at the or any other conditions above tho indicated in the operational ctions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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AD574A
REV. B –5–
DEFINITIONS OF SPECIFICATIONS
LINEARITY ERROR
Linearity error refers to the deviation of each individual code from a line drawn from “zero” through “full scale”. The point ud as “zero” occurs 1/2 LSB (1.22 mV for 10 volt span) be-fore the first code transition (all zeros to only the LSB “on”).“Full scale” is defined as a level 1 1/2 LSB beyond the last code transition (to all ones). The deviation of a code from the true straight line is measured from the middle of each particular code.
The AD574AK, L, T, and U grades are guaranteed for maxi-mum nonlinearity of ±1/2 LSB. For the grades, this means that an analog value which falls exactly in the center of a given code width will result in the correct digital output code. Values nearer the upper or lower transition of the code width may pro-duce the next upper or lower digital output code. The AD574AJ and S grades are guaranteed to ±1 LSB max error. For the grades, an analog value which falls within a given code width will result in either the correct code for that region or either adjacent one.
Note that the linearity error is not ur-adjustable.
橙色英语DIFFERENTIAL LINEARITY ERROR (NO MISSING CODES)
A specification which guarantees no missing codes requires that every code combination appear in a monotonic increasing -quence as the analog input level is incread. Thus every code must have a finite width. For the AD574AK, L, T, and U grades, which guarantee no missing codes to 12-bit resolution,all 4096 codes must be prent over the entire operating tem-perature ranges. The AD574AJ and S grades guarantee no miss-ing codes to 11-bit resolution over temperature; this means that all code combinations of the upper 11 bits must be prent; in practice very few of the 12-bit codes are missing.
UNIPOLAR OFFSET
The first transition should occur at a level 1/2 LSB above analog common. Unipolar offt is defined as the deviation of the actual transition from that point. This offt can be adjusted as discusd on the following two pages. The unipolar offt temperature coefficient specifies the maximum change of the transition point over temperature, with or without external adjustment.
BIPOLAR OFFSET
In the bipolar mode the major carry transition (0111 1111 1111to 1000 0000 0000) should occur for an analog value 1/2 LSB below analog common. The bipolar offt error and temperature coefficient specify the initial deviation and maximum change in the error over temperature.
QUANTIZATION UNCERTAINTY
Analog-to-digital converters exhibit an inherent quantization uncertainty of ±1/2 LSB. This uncertainty is a fundamental
characteristic of the quantization process and cannot be reduced for a converter of given resolution.
LEFT-JUSTIFIED DATA
The data format ud in the AD574A is left-justified. This means that the data reprents the analog input as a fraction of
full-scale, ranging from 0 to 4095
4096. This implies a binary point
to the left of the MSB .
FULL-SCALE CALIBRATION ERROR
The last transition (from 1111 1111 1110 to 1111 1111 1111)
should occur for an analog value 1 1/2 LSB below the nominal full scale (9.9963 volts for 10.000 volts full scale). The full-scale calibration error is the deviation of the actual level at the last transition from the ideal level. This error, which is typically 0.05% to 0.1% of full scale, can be trimmed out as shown in Figures 3 and 4.
TEMPERATURE COEFFICIENTS
The temperature coefficients for full-scale calibration, unipolar offt, and bipolar offt specify the maximum change from the initial (25°C) value to the value at T MIN or T MAX .
POWER SUPPLY REJECTION
The standard specifications for the AD574A assume u of +5.00 V and ±15.00 V or ±12.00 V supplies. The only effect of power supply error on the performance of the device will be a small change in the full-scale calibration. This will result in a linear change in all lower order codes. The specifications show the maximum full-scale change from the initial value with the supplies at the vari
ous limits.
CODE WIDTH
A fundamental quantity for A/D converter specifications is the code width. This is defined as the range of analog input values for which a given digital output code will occur. The nominal value of a code width is equivalent to 1 least significant bit (LSB) of the full-scale range or 2.44 mV out of 10 volts for a 12-bit ADC.
THE AD574A OFFERS GUARANTEED MAXIMUM LINEARITY ERROR OVER THE FULL OPERATING TEMPERATURE RANGE
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AD574A
REV. B
–6–
CIRCUIT OPERATION
The AD574A is a complete 12-bit A/D converter which requires no external components to provide the complete successive-approximation analog-to-digital conversion function. A block diagram of the AD574A is shown in Figure 1.
DIGITAL COMMON DC
+5V SUPPLY
V LOGIC
DATA MODE SELECT
12/8
STATUS STS DB11MSB DB10DB9DB8DB7DB6DB5DB4
DB3DB2DB1DB0LSB DIGITAL DATA OUTPUTS
CHIP SELECT
CS
BYTE ADDRESS/SHORT CYCLE
A O
READ/CONVERT
R/C
CHIP ENABLE
CE
+12/+15V SUPPLY
V CC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
剩下的盛夏mvV EE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10V IN
20V SPAN INPUT 20V IN
Figure 1.Block Diagram of AD574A 12-Bit A-to-D Converter
When the control ction is commanded to initiate a conversion (as described later), it enables the clock and rets the successive-approximation register (SAR) to all zeros. Once a conversion cycle has begun, it cannot be stopped or restarted and data is not available from the output buffers. The SAR, timed by the clock, will quence through the conversion cycle and return an end-of-convert flag to the control ction. The control ction will then disable the clock, bring the output status flag low, and enable control functions to allow data read functions by external command.
During the conversion cycle, the internal 12-bit current output DAC is quenced by the SAR from the most significant bit (MSB) to least significant bit (LSB) to provide an output cur-rent which accurately balances the input signal current through the 5 k Ω (or 10 k Ω) input resistor. The comparator determines whether the addition of each successively-weighted bit current caus the DAC current sum to be greater or less than the input current; if the sum is less, the bit is left on; if more, the bit is turned off. After testing all the bits, the SAR contains a 12-bit binary code which accurately reprents the input signal to within ±1/2 LSB.
The temperature-compensated buried Zener reference provides the primary voltage reference to the DAC and guarantees excel-lent stability with both time and temperature. The reference is trimmed to 10.00 volts ±0.2%; it can supply up to 1.5 mA to an external load in addition to the requirements of the reference in-put resistor (0.5 mA) and bipolar offt resistor (1 mA) when the AD574A is powered from ±15 V supplies. If the AD574A is ud with ±12 V supplies, or if external current must be sup-plied over the full temperature range, an external buffer ampli-fier is recommended. Any external load on the AD574A reference must remain constant during conversion. The thin-film application resistors are trimmed to match the
full-scale output current of the DAC. There are two 5 k Ω input scaling resistors to allow either a 10 volt or 20 volt span. The 10 k Ω bipolar offt resistor is grounded for unipolar operation and connected to the 10 volt reference for bipolar operation.
DRIVING THE AD574 ANALOG INPUT
The internal circuitry of the AD574 dictates that its analog input be driven by a low source impedance. Voltage changes at the current summing node of the internal comparator result in abrupt modulations of the current at the analog input. For accu-rate 12-bit conversions the driving source m
ust be capable of holding a constant output voltage under the dynamically changing load conditions.
Figure 2.Op Amp – AD574A Interface
The output impedance of an op amp has an open-loop value which, in a clod loop, is divided by the loop gain available at the frequency of interest. The amplifier should have acceptable loop gain at 500 kHz for u with the AD574A. To check whether the output properties of a signal source are suitable,monitor the AD574’s input with an oscilloscope while a conver-sion is in progress. Each of the 12 disturbances should subside in 1 µs or less.
For applications involving the u of a sample-and-hold ampli-fier, the AD585 is recommended. The AD711 or AD544 op amps are recommended for dc applications.
SAMPLE-AND-HOLD AMPLIFIERS
Although the conversion time of the AD574A is a maximum of 35 µs, to achieve accurate 12-bit conversions of frequencies greater than a few Hz requires the u of a sample-and-hold amplifier (SHA). If the voltage of the analog input signal driving the AD574A changes by more than 1/2 LSB over the time
interval needed to make a conversion, then the input requires a SHA.
The AD585 is a high linearity SHA capable of directly driving the analog input of the AD574A. The AD585’s fast acquisition time, low aperture and low aperture jitter are ideally suited for high-speed data acquisition systems. Consider the AD574A converter with a 35 µs conversion time and an input signal of 10 V p-p: the maximum frequency which may be applied to achieve rated accuracy is 1.5 Hz. However, with the addition of an AD585, as shown in Figure 3, the maximum frequency increas to 26 kHz.
The AD585’s low output impedance, fast-loop respon, and low droop maintain 12-bits of accuracy under the changing load conditions that occur during a conversion, making it suitable for u in high accuracy conversion systems. Many other SHAs cannot achieve 12-bits of accuracy and can thus compromi a system. The AD585 is recommended for AD574A applications requiring a sample and hold.
An alternate approach is to u the AD1674, which combines the ADC and SHA on one chip, with a total throughput time of 10 µs./
