HT82V38
16-Bit CCD/CIS Analog Signal Processor
Block Diagram
Rev.1.201June 1,
2012
Features
青果
虾仁瘦肉粥·Operating voltage:3.3V (typ.)·Low Power CMOS:300mW (typ.)·Power-Down Mode:10m A (max.)·16-Bit 30MSPS A/D converter ·Guaranteed won ¢t miss codes ·1~5.85x programmable gain ·Correlated double sampling ·±250mV programmable offt ·Input clamp circuitry
·Internal voltage reference
显微镜光学·Multiplexed byte-wide output (8+8format)·Programmable 3-wire rial interface ·3.3V digital I/O compatibility ·3-Channel operation up to 30MSPS
·2-Channel (even-odd)operation up to 30MSPS ·1-Channel operation up to 20MSPS ·28-pin SSOP (209mil)package党旗怎么画
General Description
The HT82V38is a complete analog signal processor for CCD imaging applications.It features a 3channel archi-tecture designed to sample and condition the outputs of trilinear color CCD arrays.Each channel consists of an input clamp,Correlated Double Sampler (CDS),offt DAC and Programmable Gain Amplifier (PGA),multi-plexed to a high performance 16-bit A/D converter.The CDS amplifiers may be disabled for u with n-sors such as Contact Image Sensors (CIS)and CMOS active pixel nsors,which do not require CDS.
The 16-bit digital output is multiplexed into an 8-bit out-put word that is accesd using two read cycles.The in-ternal registers are programmed through a 3-wire rial interface,and provide adjustment of the gain,offt,and operating mode.
卧鸡蛋的做法Applications
·Flatbed document scanners ·Film scanners
·Digital color copiers ·Multifunction peripherals
Pin Assignment
Pin Description
Note:AI=Analog Input,AO=Analog Output,DI=Digital Input,DO=Digital Output,P=Power
Rev.1.202June1,2012
Absolute Maximum Ratings
V SS-0.3V to V SS+4.3V -50°C to125°C V SS-0.3V to V DD+0.3V .0°C to70°C
Note:The are stress ratings only.Stress exceeding the range specified under²Absolute Maximum Ratings²may cau substantial damage to the device.Functional operation of this device at other conditions beyond tho listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C.Characteristics
A.C.Characteristics
春望古诗原文
Rev.1.203June1,2012
Timing Specification AV
=DRV DD=3.3V,AV SS=DRV SS=0V,Ta=25°C,ADCCLK=30MHz unless otherwi stated
DD
寝室活动策划
Rev.1.204June1,2012
邮票价值
Rev.1.205June 1,2012
Functional Description
Integral Nonlinear (INL)
Integral nonlinearity error refers to the deviation of each individual code from a line drawn from ²zero scale ²through ²positive full scale ².The point ud as ²zero scale ²occurs 1/2LSB before the first code transition.²Positive full scale ²is defined as a level 1/2LSB beyond the last code transition.The d
eviation is measured from the middle of each particular code to the true straight line.
Differential Nonlinear (DNL)
An ideal ADC exhibits code transitions that are exactly 1LSB apart.DNL is the deviation from this ideal value.Thus every code must have a finite width.No missing codes guaranteed to 16-bit resolution indicates that all 4096codes,respectively,must be prent over all oper-ating ranges.Offt Error
The first ADC code transition should occur at a level 1/2LSB above the nominal zero scale voltage.The offt error is the deviation of the actual first code transition level from the ideal level.
Gain Error
The last code transition should occur for an analog value 1/2LSB below the full-scale voltage (2´(REFT -REFB)).Gain error is the deviation of the ac-tual difference between first and last code transitions and the ideal difference between the first and last code transitions.Aperture Delay
The aperture delay is the time delay that occurs from when a sampling edge is applied to the HT82V38until the actual sample of the input signal is held.Both CDSCLK1and CDSCLK2sample the
input signal dur-ing the transition from high to low,so the aperture delay is measured from each clock ¢s falling edge to the instant the actual internal sample is taken.
