Low Power, 24-Bit/16-Bit
Sigma-Delta ADC with In-Amp Preliminary Technical Data AD7798/AD7799
Rev. PrD.
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FEATURES
Resolution: AD7798:
16-Bit
AD7799: 24-Bit
Three Differential Analog Inputs
Low Noi Programmable Gain Amp
RMS noi: 80 nV (Gain = 64) at 16.6 Hz update rate (AD7798) 65 nV (Gain = 64) at 16.6 Hz update rate (AD7799)
30 nV (Gain = 64) at 4 Hz update rate (AD7799) Update Rate: 4 Hz to 500 Hz
Power
Supply: 2.7 V to 5.25 V operation
Normal: 330 µA typ (AD7798)
维c美白400 µA typ (AD7799)
Power-down: 1 µA max
Simultaneous 50 Hz/60 Hz Rejection
Two Programmable Digital Outputs
Internal Clock Oscillator
Reference Detect
100 nA Burnout Currents
Low Side Power Switch
Independent Interface Power Supply
16-Lead TSSOP
INTERFACE
3-wire rial
SPI®, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
雅思报名入口
APPLICATIONS
Pressure measurement
Weigh scales FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD7798/AD7799 is a low power, complete analog front end for low frequency measurement applications. The device contains a low noi 24-bit (AD7799)/ 16-bit (AD7798) ∑-∆ ADC with three differential inputs. The on-chip low noi instrumentation amplifier means that signals of small amplit
ude can be interfaced directly to the ADC. With a gain tting of 64, the rms noi is 80 nV for AD7798 and 65 nV for the AD7799 at 16.6 Hz.
T he device contains a low side power switch which is uful in bridge applications. The switch allows the bridge to be disconnected from the power supply when conversions are not being performed and this will minimi power consumption. The device also has 100 nA burnout currents. The currents are ud to detect if nsors connected to the analog inputs are burnt out. Other on-chip features include an internal clock so the ur does not have to supply a clock to the device. This reduces the component count in a system and provides board space savings. The update rate is programmable on the
AD7798/99. It can be varied from 4 Hz to 500 Hz. The part operates with a single power supply from 2.7 V to 5.25 V. It consumes a current of 380 uA maximum for the AD7798 and 450 uA maximum for the AD7799. The AD7799/AD7798 is houd in a 16-lead TSSOP package.
AD7798/AD7799
Preliminary Technical Data
REV. PrD. Page 2 of 17
TABLE OF CONTENTS
AD7799/AD7798—3 Timing Characteristics , ....................................................................6 Absolute 8 Pin Configuration and 9 Typical 11 12 Communications Register (RS2, RS1, RS0 = 0, 0, 0)..............12 Status Register (RS2, RS1, RS0 = 0, 0, 0; Power-on/Ret = 0x88).............................................................................................13 Mode Register (RS2, RS1, RS0 = 0, 0, 1; Power-on/Ret = 0x000A). (13)
Configuration Register (rs2, RS1, RS0 = 0, 1, 0; Power-on/Ret = 0x0710)....................................................................15 Data Register (RS2, RS1, RS0 = 0, 1, 1; Power-on/Ret =
0x0000 (AD7798)/ 0x000000 (AD7799))................................16 ID Register (RS2, RS1, RS0 = 1, 0, 0; Power-on/Ret = 0xX8 (AD7798)/ 0xX9 (AD7799)).....................................................16 OFFSET Register (RS2, RS1, RS0 = 1, 1, 0; Power-on/Ret = 0x8000 (AD7798)/0x800000 (AD7799))............
.....................17 FULLSCALE Register (RS2, RS1, RS0 = 1, 1, 1; Power-on/Ret = 0x5XXX (AD7798)/0x5XXX000 (AD7799)).....17 TYPICAL APPLICATION.. (17)
REVISION HISTORY
Prelim D, June 2004: Initial Version
Preliminary Technical Data
AD7798/AD7799
REV. PrD. Page 3 of 17
AD7799/AD7798—SPECIFICATIONS 1
Table 1. (AV DD = 2.7 V to 5.25 V; DV DD = 2.7 V to 5.25 V; GND = 0 V; REFIN(+) = 2.5 V; REFIN(-) = 0 V; all specifications T MIN to T MAX , unless otherwi noted.)
Parameter AD7798/AD7799B Unit Test Conditions/Comments ADC CHANNEL SPECIFICATION Output Update Rate 4 Hz min nom 500 Hz max nom ADC CHANNEL No Missing Codes 224 16 Bits min Bits min AD7799, f ADC ≤ 125 Hz
AD7798
Resolution 16 Bits p-p Gain = 128, 16.6 Hz Update Rate
19
16
18.5
Bits p-p Bits p-p Bits p-p Gain = 1, 16.6 Hz Update Rate, AD7799 Gain = 1, 16.6 Hz Update Rate, AD7798 Gain = 64, 4 Hz Update Rate, AD7799
Output Noi and Update Rates See Tables in ADC
Description职位申请书怎么写
Integral Nonlinearity ±15 ppm of FSR max 3.5 ppm typ, Gain 1 to 32 Offt Error 3
±25 ±3 ppm of FSR max µV typ Gain = 64 or 128
Offt Error Drift vs. Temperature 4±10 nV/°C typ
Full-Scale Error 5
±10 µV typ
Gain Drift vs. Temperature 4
±0.5 ppm/°C typ Gain = 1, 2 ±3 ppm/°C typ Gain = 4 to 128 Power Supply Rejection 90 dB min 100 dB typ, AIN = 50 % of full scale ANALOG INPUTS Differential Input Voltage Ranges ±REFIN/Gain V nom REFIN = REFIN(+) – REFIN(–), Gain = 1 to 128
Absolute AIN Voltage Limits
2
Unbuffered Mode
Buffered Mode In-Amp Enabled GND + 30 mV AV DD – 30 mV GND + 100 mV
AV DD – 100 mV
GND + 300 mV
V DD – 1.2
V max V min V min V max V min V max Gain = 1 or 2 Gain = 1 or 2 Gain = 4 to 128 Common Mode Voltage
In-Amp Enabled
Analog Input Current
Buffered Mode or In-Amp Enabled
0.5 V min Gain = 4 to 128 Average Input Current ±200 ±1 pA max nA max AIN1(+) – AIN1(-), AIN2(+) – AIN2(-) only.
AIN3(+) – AIN3(-).
Average Input Current Drift ±2 pA/°C typ Unbuffered Mode Average Input Current ±400 nA/V typ
Gain = 1 or 2
ps复制图层Input current varies with input voltage. Average Input Current Drift
Normal Mode Rejection 2
@ 50 Hz, 60 Hz
±50 70 pA/V/°C typ dB min 73 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz 84 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 10016 @ 60 Hz 90 dB min 90 dB typ, 60 ± 1 Hz, FS[3:0] = 10006
Common Mode Rejection
@DC
@ 50 Hz, 60 Hz 90 100 dB min dB min AIN = 50% of FS 80 dB typ, FS[3:0] = 10106 50 ± 1 Hz (FS[3:0] = 10016), 60 ± 1 Hz (FS[3:0] =
10006)
AD7798/AD7799
Preliminary Technical Data
我的世界你不懂
REV. PrD. Page 4 of 17
Parameter AD7798/AD7799B Unit Test Conditions/Comments REFERENCE INPUT REFIN Voltage 2.5 V nom REFIN = REFIN(+) – REFIN(–)
Reference Voltage Range
Absolute REFIN Voltage Limits 0.1 AV DD GND – 30 mV
V min V max V min AV DD + 30 mV V max Average reference Input Current 400 nA/V typ Average Reference Input Current Drift ±0.03 nA/V/°C typ Normal Mode Rejection See ANALOG INPUTS Common Mode Rejection See ANALOG INPUTS Reference Detect 0.3 0.65 V min V max NOREF bit Inactive if VREF < 0.3 V
NOREF bit Active if VREF > 0.65 V
LOW SIDE POWER SWITCH
R ON
Allowable Current 5 7 20 Ω max Ω max mA max AV DD = 5V AV DD = 3V Continuous Current INTERNAL CLOCK
Drift
64 ±2% 0.01
KHz nom %/°C typ LOGIC INPUTS All Inputs Except SCLK and DIN V INL , Input Low Voltage 0.8 V max DV DD = 5 V 0.4 V max DV DD = 3 V
V INH , Input High Voltage 2.0 V min DV DD = 3 V or 5 V
SCLK and DIN Only (Schmitt-Triggered Input)
V T (+) 1.4/2 V min/V max DV DD = 5 V V T (–) 0.8/1.4 V min/V max DV DD = 5 V V T (+) – V T (–) 0.3/0.85 V min/V max DV DD = 5 V V T (+) 0.9/2 V min/V max DV DD = 3 V V T (–) 0.4/1.1 V min/V max DV DD = 3 V
V T (+) - V T (–)
Input Currents Input Capacitance 0.3/0.85 ±1 10 V min/V max µA max pF typ DV DD = 3 V V IN = DV DD or GND All Digital Inputs
LOGIC OUTPUTS V OH , Output High Voltage DV DD – 0.6 V min DV DD = 3 V, I SOURCE = 100 µA V OL , Output Low Voltage 0.4 V max DV DD = 3 V, I SINK = 100 µA V OH , Output High Voltage 4 V min DV DD = 5 V, I SOURCE = 200 µA V OL , Output Low Voltage 0.4 V max DV DD = 5 V, I SINK = 1.6 mA
Floating-State Leakage Current ±1 µA max Floating-State Output Capacitance 10 pF typ Data Output Coding Offt Binary
DIGITAL OUTPUTS
P1 and P2
V OH , Output High Voltage 2
行李箱收纳
V OL , Output Low Voltage
V OH , Output High Voltage 2 V OL , Output Low Voltage
AV DD – 0.6 0.4 4 0.4 V min V max V min V max AV DD = 3 V, I SOURCE = 100 µA AV DD = 3 V, I SINK = 100 µA AV DD = 5 V, I SOURCE = 200 µA AV DD = 5 V, I SINK = 800 µA
Preliminary Technical Data
AD7798/AD7799
REV. PrD. Page 5 of 17
Parameter AD7798/AD7799B Unit Test Conditions/Comments
SYSTEM CALIBRATION
2
Full-Scale Calibration Limit Zero-Scale Calibration Limit Input Span 1.05 x FS
-1.05 x FS
0.8 x FS
2.1 x FS
V max V min V min V max POWER REQUIREMENTS 7Power Supply Voltage V DD – GND IOV DD – GND 2.7/5.25 2.7/5.25 V min/max V min/max Power Supply Currents I DD Current 150 µA max 125 µA typ, Unbuffered Mode 175 µA max 150 µA typ, Buffered Mode, In-Amp Bypasd 380 450 µA max µA max 330 µA typ, In-Amp ud (AD7798)
400 µA typ, IN-AMP ud (AD7799)
I DD (Power-Down Mode) 1 µA max
1 Temperature Range –40°C to +105°C.
2
Specification is not production tested but is supported by characterization data at initial product relea. 3
A System calibration will reduce this error to the order of the noi for the programmed gain and update rate. 4
A calibration at any temperature will remove this error. 5
诺丁汉特伦特
Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AV DD = 4 V). 6
元旦的由来
FS[3:0] are the four bits ud in the mode register to lect the output word rate. 7
Digital inputs equal to DV DD or GND.
