专利名称：Stacked via Kelvin resistance test structure
for measuring contact anomalies in multi-
level metal integrated circuit technologies
发明人：Robert Alan Ashton,Steven Alan Lytle,Mary
资阳景点Drummond Roby,Daniel Joph Vitkavage
申请号：US09388203
吴吟秋申请日：19990901古代法律
公开号：US06362638B1
公开日：
20020326
专利内容由知识产权出版社提供
专利附图：
摘要：A method and apparatus for measuring Kelvin contact resistance within an
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integrated circuit interconnect is provided, having upper and lower Kelvin contact resistance contacts covering a via and interconnect being measured, along with a third conductor placed substantially between the upper and lower Kelvin contacts, and in contact with the via.数学趣事
青椒炒肉丝怎么做申请人：AGERE SYSTEMS GUARDIAN CORP.
爱的接力代理机构：Alston & Bird LLP
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