MemTest86 Test Algorithmsa4一半
MemTest86 us two algorithms that provide a reasonable approximation of the ideal test strategy above. The first of the strategies is called moving inversions. The moving inversion test works as follows:
1.走在路上作文Fill memory with a pattern
2.Starting at the lowest address
ocheck that the pattern has not changed
owrite the patterns complement
oincrement the address
orepeat
马铃薯的功效与作用3.Starting at the highest address
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ocheck that the pattern has not changed
通过的近义词地球仪owrite the patterns complement
odecrement the address
orepeat
This algorithm is a good approximation of an ideal memory test but there are some limitations. Most high density chips today store data 4 to 16 bits wide. With chips that are more than one bit wide it is impossible to lectively read or write just one bit. This means that we cannot guarantee that all adjacent cells have been tested for interaction. In this ca the best we can do is to u some patterns to insure that all adjacent cells have at least been written with all possible one and zero combinations.小学生用刘组词
It can also be en that caching, buffering and out of order execution will interfere with the moving inversions algorithm and make less effective. It is possible to turn off cache but the memory buffering in new high performance chips can not be disabled. To address
this limitation a new algorithm I call Modulo-X was created. This algorithm is not affected by cache or buffering. The algorithm works as follows:
1.For starting offts of 0 - 20 do
owrite every 20th location with a pattern
owrite all other locations with the patterns complement
orepeat above one or more times
ocheck every 20th location for the pattern
This algorithm accomplishes nearly the same level of adjacency testing as moving inversions but is not affected by caching or buffering. Since parate write pass (1a, 1b) and the read pass (1c) are done for all of memory we can be assured that all of the buffers and cache have been flushed between pass. The lection of 20 as the stride size was somewhat arbitrary. Larger strides may be more effective but would take longer
to execute. The choice of 20 emed to be a reasonable compromi between speed and thoroughness.
Individual Test Descriptions
MemTest86 executes a ries of numbered test ctions to check for errors. The test ctions consist of a combination of test algorithm, data pattern and cache tting. The execution order for the tests were arranged so that errors will be detected as rapidly as possible. A description of each of the test ctions follows:
Test 0 [Address test, walking ones, no cache]
Tests all address bits in all memory banks by using a walking ones address pattern.
Test 1 [Address test, own address, Sequential]
Each address is written with its own address and then is checked for consistency. In theory previous tests should have caught any memory addressing problems. This test sh
ould catch any addressing errors that somehow were not previously detected. This test is done quentially with each available CPU.
Test 2 [Address test, own address, Parallel]
Same as test 1 but the testing is done in parallel using all CPUs and using overlapping address.
Test 3 [Moving inversions, ones&zeros, Parallel]
This test us the moving inversions algorithm with patterns of all ones and zeros. Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This is done in parallel using all CPUs.
Test 4 [Moving inversions, 8 bit pattern]
This is the same as test 3 but us a 8 bit wide pattern of "walking" ones and zeros. This test will better detect subtle errors in "wide" memory chips.
Test 5 [Moving inversions, random pattern]
Test 5 us the same algorithm as test 4 but the data pattern is a random number and it's complement. This test is particularly effective in finding difficult to detect data nsitive errors. The random number quence is different with each pass so multiple pass increa effectiveness.
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Test 6 [Block move, 64 moves]
This test stress memory by using block move (movsl) instructions and is bad on Robert Redelmeier's burnBX test. Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction. After the moves are completed the data patterns are checked. Becau the data is checked only after the memory moves are completed it is not possible to know where the error occurred. The address reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb gment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are no
t ud to calculate BadRAM patterns.
Test 7 [Moving inversions, 32 bit pattern]
This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address. The starting bit position is shifted left for each pass. To u all possible data patterns 32 pass are required. This test is quite effective at detecting data nsitive errors but the execution time is long.
