Analog Frequency Multiplier
PL560-xx VCXO Family
PRODUCT DESCRIPTION
PhaLink’s Analog Frequency Multiplier TM (AFM) is the industry’s first ‘Balanced Oscillator’ utilizing analog multiplication of the fundamental frequency (at double or quadruple frequency), combined with an attenuation of the fundamental of the reference crystal, without the u of a pha-locked loop (PLL), in CMOS technology.
PhaLink’s patent pending PL560-xx family of AFM products can achieve up to 800 MHz output frequency with little jitter or pha noi deterioration. In addition, the low frequency input crystal requirement makes the AFMs the most affordable high-performance timing-source in the market.
PL560-xx family of products utilize low-power CMOS technology and are houd in GREEN/ RoHS compliant 16-pin TSSOP, and 16-pin 3x3 QFN packages. FEATURES
•Non-PLL frequency multiplication
•Input frequency from 30-200 MHz
•Output frequency from 60-800 MHz
•Low pha noi and jitter (equivalent to fundamental
crystal at the output frequency)
•Ultra-low jitter
o RMS pha jitter < 0.25 ps (12kHz-20MHz)
o RMS period jitter < 2.5 ps
•Low pha noi
高三数学试卷o-142 dBc/Hz @100kHz offt from 155.52 MHz
o-150 dBc/Hz @10MHz offt from 155.52 MHz •High linearity pull range (typ. 5%)
•+/- 120 PPM pullability VCXO
•Low input frequency eliminates the need for expensive crystals
•Differential output levels (PECL, LVDS), or single-
ended CMOS
•Single 2.5V or 3.3V +/- 10% power supply •Optional industrial temperature range (-40°C to +85°C) •Available in 16-pin GREEN/RoHS compliant TSSOP,
and 3x3 QFN
Figure 1: 2x AFM Pha Noi at 311.04MHz
Analog Frequency Multiplier
PL560-xx VCXO Family
O E
Q
Q B A R
Figure 2: Block Diagram of VCXO AFM
Figure 3 shows the period jitter histogram of the 2x Analog Frequency Multiplier at 311.04 MHz, while Figure 4 shows the very low rejection levels of sub-harmonics that correspond to the exceptionally low jitter performance.
Figure 3: Period Jitter Histogram at 311.04 MHz Figure 4: Spectrum Analysis at 311.04 MHz
Analog Frequency Multiplier (2x) Analog Frequency Multiplier (2x) with 155.52MHz crystal with sub-harmonics below –72 dBc
OE LOGIC SELECTION
OUTPUT OESEL OE Output State
0 (Default) Enabled
0 (Default)
1 Tri-state
0 Tri-state
PECL
1
1 (Default) Enabled
0 Tri-state
0 (Default)
1 (Default) Enabled
0 (Default) Enabled
LVDS or CMOS
1
1 Tri-state
面试案例
OESEL and OE: Connect to VDD to t to “1”, connect to GND to t to “0”. Internally t to default through pull-down / -up.
Analog Frequency Multiplier
PL560-xx VCXO Family
PRODUCT SELECTION GUIDE
FREQUENCY VERSUS PHASE NOISE PERFORMANCE
Pha Noi at Frequency Offt From Carrier (dBc/Hz)
Part Number
Input Frequency Range (MHz)
Analog Frequency Multiplication Factor
Output Frequency Range (MHz)
Output Type
Carrier Freq. (MHz) 10 Hz 100 Hz 1 KHz 10 KHz 100 KHz 1 MHz 10 MHz PL560-08 75 - 200 4 300 - 800 PECL 622.08 -55 -85 -110 -130 -137 -148 -150 PL560-09 75 - 200 4 300 - 800 LVDS 622.08 -55 -85 -110 -130 -137 -148 -150 PL560-37 30 - 80 4 120 - 320 CMOS 155.52 -50 -82 -110 -
128 -142 -148 -150 PL560-38 30 - 80 4 120 - 320 PECL 155.52 -50 -82 -110 -128 -142 -148 -150 PL560-39 30 - 80 4 120 - 320 LVDS 155.52 -50 -82 -110 -128 -142 -148 -150 PL560-47 30 - 80 2 60 - 160 CMOS 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-48 30 - 80 2 60 - 160 PECL 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-49 30 - 80 2 60 - 160 LVDS 155.52 -65 -95 -122 -138 -142 -148 -149 PL560-68 75 - 200 2 150 - 400 PECL 311.04 -60 -85 -112 -135 -142 -150 -151 PL560-69
75 - 200
2
150 - 400
LVDS
311.04
-60
-85
-112
-135
-142
-150
-151
Pha noi was measured using Agilent E5500.
FREQUENCY VERSUS JITTER, AND SUB-HARMONIC PERFORMANCE
RMS Period
Jitter (ps)
Peak to Peak Period Jitter (ps) RMS Accumulated
(L.T.) Jitter (ps)
RMS Pha Jitter
(12 KHz-20MHz) (ps) Spectral Specifications / Sub-harmonic Content
恩赐的反义词(dBc), Frequency (MHz)
Part Number
Output. Freq. (MHz)
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Carrier Freq. (Fc) @ -75% (Fc) @ -50% (Fc) @ -25% (Fc) @ +25% (Fc) @ +50% (Fc) @
+75%
(Fc) PL560-08 622 4 6 25 30 6 0.09 622 -50 -50 -45 -47 -47 -55 PL560-09 622 4 6 25 30 6 0.09 622
-50
-50 -45 -47 -47 -55 PL560-37 155 2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-38 155
2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-39 155 2.5 3 18 20 3 0.25 155.52 -75 -62 -65 -75 PL560-47 155 2.5 3 18 20 3 0.25 155.52 -68 -68 PL560-48 155 2.5 3 18 20 3 0.25 155.52 -68 -68 PL560-49 155 2.5 3 18 20 3 0.27 155.52 -68 -68 PL560-68 311 2.5 3 18 20 3 0.18 311.04 -72 -85 PL560-69
遗产税草案311
2.5
3
18
20
3
0.18
311.04
-
72
-85
Note: Wavecrest data 10,000 hits. No filtering was ud in jitter calculations. Agilent 5500 was ud for pha jitter measurements.
Spectral specifications were obtained using Agilent E7401A.
Analog Frequency Multiplier
PL560-xx VCXO Family
CRYSTAL SPECIFICATIONS AND BOARD LAYOUT CONSIDERATIONS BOARD LAYOUT CONSIDERATIONS
To minimize parasitic effects, and improve performance:
• Place the crystal as clo as possible to the IC.
• Make the board traces that are connected to the crystal pins symmetrical.
• The board trace symmetry is important, as it reduces the negative parasitic effects to produce a clean frequency multiplication with
low jitter. Parasitic effects reduce frequency pulling of the VCXO and increa jitter.
CRYSTAL SPECIFICATIONS & TUNING PERFORMANCE
CRYSTAL SPECIFICATIONS
TUNING PERFORMANCE
CL (xtal)
ESR (R E )
CRYSTAL
TUNING (Typical) PART NUMBER
CRYSTAL RESONATOR FREQUENCY (FXIN)
MODE
CONDI-
TIONS
TYP.
Max.
CRYSTAL FREQ (MHz) C0 C1 C0/C1
VC: 1.65V 0V
VC: 1.65V 3.4V 155.52
3.0pF
12.2fF
245
-145 ppm
考研计划
+108 ppm
PL560-08/09 PL560-68/69
75~200MHz
Funda- mental
At
VCON
花开红树乱莺啼= 1.65V
5pF
30 Ω
155.52 1.8pF 5.7fF 316 -134 ppm +87 ppm 30.72
2.8pF 12.4fF 228 -167ppm +176 ppm 30.72
4.5pF 19.1fF 236 -163 ppm +167 ppm 38.88
5.1pF 20.9fF 242 -131 ppm +98 ppm 38.88 5.3pF 25.6fF 207 -157 ppm +141 ppm PL560-37/38/39 PL560-47/48/49
30~80MHz
Funda- mental
At
VCON
= 1.65V
5pF
30 Ω
77.76
2.0pF
6.7fF
305
-92 ppm
+110 ppm
Note: Non specified parameters can be chon as standard values from crystal suppliers.
CL ratings larger than 5pF require a crystal frequency adjustment. Request detailed crystal specifications from PhaLink.
卫生小常识XTAL
XTAL
Ceramic SMD
AFM IC
XIN (Pin # 4)肉炒肉
XOUT (Pin # 5)
AFM IC
XIN (Pin # 4)
XOUT (Pin # 5)
Analog Frequency Multiplier
PL560-xx VCXO Family VOLTAGE CONTROL SPECIFICATION
PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS
VCXO Stabilization Time T VCXOSTB From power valid 10 ms
VCXO Tuning Range XTAL C0 /C1 <300 200 ppm
CLK Output Pullability VCON= 1.65V ± 1.65V
±100 ±120 ppm
XTAL C0 /C1 <300
Linearity 5 10 %
VCON Input Impedance 130 kΩ
VCON Modulation BW 0V < VCON < 3.3V, -3dB 25 kHz EXTERNAL COMPONENT VALUES
INDUCTOR VALUE OPTIMIZATION
The required inductor value(s) for the best performance depends on the operating frequency, and the board layout specifications. The listed values in this datasheet are bad on the calculated parasitic values from PhaLink’s evaluation board design. The inductor values provide the ur with a starting point to determine the optimum inductor values. Additional fine-tuning may be required to determine the optimal solution.
To assist with the inductor value optimization, PhaLink has developed the “AFM Tuning Assistant” software. You can download this software from PhaLink’s web site (). The software consists of two worksheets. The first worksheet (named L2) is ud to fine-tune the ‘L2’ inductor value, and the cond worksheet (named L4) is ud for fine tuning of the ‘L4’ (ud in 4x AFMs only) inductor value.
For tho designs using PhaLink’s recommended board layout, you can u the “AFM Tuning Assistant” to determine the optimum values for the required inductors. This software is developed bad on the parasitic information from PhaLink’s board layout and can be ud to determine the required inductor and parallel capacitor (e LWB1 and Cstray parameters) values. For tho employing a different board layout in their design, we recommend to u the parasitic information of their board layout to calculate the optimized inductor values. Plea u the following fine tuning pro
cedure:
