手术室实习小结
活在当下作文专利名称：FREQUENCY 5-DEMULTIPLIER CIRCUIT 发明人：YANAKA TAKESHI
描写笑申请号：JP13015491我们这个年纪
修改字体申请日：19910603
公开号：JPH04355515A
托管合同公开日：
哈梵
19921209
专利内容由知识产权出版社提供
摘要：PURPOSE:To frequency-divide an input signal to convert it to an output signal who frequency is 1/5 of the frequency of the input signal and to generate the output signal who duty factor is 1: 1. CONSTITUTION:An inverter 41 inverts an input signal and the result is inputted to the clock input of DFFs 13, 14. A buffer 31 receives the input signal to u it as a clock input of DFFs 11, 12 for the output of a delay time equal to the delay in the inverter 41. An AND gate 21 ANDs the inverted output of the DFF 12 and an inverted output of the DFF 14 and us the result as the data input of DFFs 11, 13. The DFF 15 receives the output of the AND gate 21 as its clock input and us its own inverted output as the data input and outputs an output signal being 1/5 frequency division of the input signal.
肉松蛋卷申请人：NEC ENG LTD
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