Dual 64-/256-Position I2C Nonvolatile
Memory Digital Potentiometers
AD5251/AD5252 Rev. B
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responsibility is assumed by Analog Devices for its u, nor for any infringements of patents or other rights of third parties that may result from its u. Specifications subject to change without notice. No licen is granted by implication or otherwi under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 © 2004–2009 Analog Devices, Inc. All rights rerved.
FEATURES
AD5251: Dual 64-position resolution
AD5252: Dual 256-position resolution
1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
举的组词Nonvolatile memory1 stores wiper tting w/write protection Power-on refreshed with EEMEM ttings in 300 μs typ EEMEM rewrite time = 540 μs typ
Resistance tolerance stored in nonvolatile memory
12 extra bytes in EEMEM for ur-defined information
I2C-compatible rial interface
Direct read/write access of RDAC2 and EEMEM registers Predefined linear increment/decrement commands Predefined ±6 dB step change commands
Synchronous or asynchronous dual-channel update
Wiper tting readback
4 MHz bandwidth—1 kΩ version
Single supply 2.7 V to 5.5 V
Dual supply ±2.25 V to ±2.75 V
2 slave address decoding bits allow operation of 4 devices 100-year typical data retention, T A = 55°C
Operating temperature: –40°C to +85°C APPLICATIONS
Mechanical potentiometer replacement
General-purpo DAC replacement
LCD panel V COM adjustment
White LED brightness adjustment
RF ba station power amp bias control
Programmable gain and offt control
Programmable voltage-to-current conversion Programmable power supply
Sensor calibrations
GENERAL DESCRIPTION
The AD5251/AD5252 are dual-channel, I2C®, nonvolatile mem-ory, digitally controlled potentiometers with 64/256 positions, respectively. The devices perform the same electronic adjust-ment functions as mechanical potentiometers, trimmers, and variable resistors. The parts’ versatile programmability allows multiple modes of operation, including read/write access in the RDAC and EEMEM registers, increment/decrement of resistance, resistance changes in ±6 dB scales, wiper tting readback, and extra EEMEM for storing ur-defined information, such as memory data for other components, look-up table, or system identification information.
FUNCTIONAL BLOCK DIAGRAM
3
8
2
3
-
-
1
Figure 1.
The AD5251/AD5252 allow the host I2C controllers to write any of the 64-/256-step wiper ttings in the RDAC registers and store them in the EEMEM. Once the ttings are stored, they are restored automatically to the RDAC registers at system power-on; the ttings can also be restored dynamically.水稻的种植过程
The AD5251/AD5252 provide additional increment, decrement, +6 dB step change, and –6 dB step change in synchronous or asynchronous channel update mode. The increment and decrement functions allow stepwi linear adjustments, with a ± 6 dB step change equivalent to doubling or halving the RDAC wiper tting. The functions are uful for steep-slope, nonlinear adjustments, such as white LED brightness and audio volume control.
The AD5251/AD5252 have a patented resistance-tolerance storing function that allows the ur to access the EEMEM and obtain the absolute end-to-end resistance values of the RDACs for precision applications.
The AD5251/AD5252 are available in TSSOP-14 packages in 1 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ options. All parts are guaranteed to operate over the –40°C to +85°C extended industrial temperature range.
1 The terms nonvolatile memory and EEMEM are ud interchangeably.字体中国
2 The terms digital potentiometer and RDAC are ud interchangeably.
AD5251/AD5252
Rev. B | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Electrical Characteristics ................................................................. 3 1 kΩ Version .................................................................................. 3 10 kΩ, 50 kΩ, 100 kΩ Versions .................................................. 5 Interface Timing Characteristics ................................................ 7 Absolute Maximum Ratings ............................................................ 8 ESD Caution .................................................................................. 8 Pin Configuration and Function Descriptions ............................. 9 Typical Performance Characteristics ........................................... 10 I 2C Interface ..................................................................................... 14 I 2C Interface General Description ............................................ 14 I 2C Interface Detail Description ............................................... 15 I 2C-Compatible 2-Wire Serial Bus ........................................... 20 T
heory of Operation ...................................................................... 21 Linear Increment/Decrement Commands ............................. 21 ±6 dB Adjustments (Doubling/Halving Wiper Setting) ....... 21 Digital Input/ 22 Multiple Devices on One Bus ................................................... 22 Terminal Voltage Operation Range ......................................... 22 Power-Up and Power-Down Sequences .................................. 22 Layout and Power Supply Biasing ............................................ 23 Digital Potentiometer Operation ............................................. 23 Programmable Rheostat Operation ......................................... 23 Programmable Potentiometer Operation ............................... 24 Applications Information .............................................................. 25 LCD Panel V COM Adjustment .................................................... 25 Current-Sensing Amplifier ....................................................... 25 Adjustable High Power LED Driver ........................................ 25 Outline Dimensions ....................................................................... 26 Ordering Guide .. (27)
REVISION HISTORY
10/09—Rev. A to Rev. B
Changes to Figure 15 ...................................................................... 12 Changes to Figure 27 ...................................................................... 15 9/05—Rev. 0 to Rev. A
Updated Format .................................................................. U niversal Change to Figure 6 ......................................................................... 10 Changes to Figure 28 ...................................................................... 15 Changes to Figure 29 ...................................................................... 17 Changes to RDAC/EEMEM Quick Commands Section .......... 18 Changes to EEMEM Write Protection Section ........................... 18 Changes to Figure 37 ...................................................................... 22 Deleted Table 13 and Table 14 ...................................................... 23 Change to Figure 42 ....................................................................... 24 Change to Figure 46 ....................................................................... 25 Changes to Ordering Guide .......................................................... 27 6/04—Revision 0: Initial Version
AD5251/AD5252
Rev. B | Page 3 of 28
ELECTRICAL CHARACTERISTICS
1 kΩ VERSION
西安钟鼓楼
V DD = 3 V ± 10% or 5 V ± 10%, V SS = 0 V or V DD /V SS = ±2.5 V ± 10%, V A = V DD , V B = 0 V , –40°C < T A < +85°C, unless otherwi noted. Table 1.
Parameter Symbol Conditions Min Typ 1 Max Unit DC CHARACTERISTICS—
RHEOSTAT MODE Resolution N AD5251 6 Bits AD5252 8 Bits
Resistor Differential Nonlinearity 2
R-DNL R WB , R WA = NC, V DD = 5.5 V, AD5251 –0.5 ±0.2 +0.5 LSB R WB , R WA = NC, V DD = 5.5 V, AD5252 –1.00 ±0.25 +1.00 LSB R WB , R WA = NC, V DD = 2.7 V, AD5251 –0.75 ±0.30 +0.75 LSB
R WB , R WA = NC, V DD = 2.7 V, AD5252 –1.5 ±0.3 +1.5 LSB Resistor Nonlinearity 2 R-I NL R WB , R WA = NC, V DD = 5.5 V, AD5251 –0.5 ±0.2 +0.5 LSB R WB , R WA = NC, V DD = 5.5 V, AD5252 –2.0 ±0.5 +2.0 LSB R WB , R WA = NC, V DD = 2.7 V, AD5251 –1.0 +2.5 +4.0 LSB R WB , R WA = NC, V DD = 2.7 V, AD5252 –2 +9 +14 LSB Nominal Resistor Tolerance ΔR AB /R AB T A = 25°C –30 +30 % Resistance Temperature Coefficient (ΔR AB /R AB ) × 106/ΔT 650 ppm/°C Wiper Resistance R W I W = 1 V/R, V DD = 5 V 75 130 Ω I W = 1 V/R, V DD = 3 V 200 300 Ω Channel-Resistance Matching ΔR AB1/ΔR AB3 0.15 %
DC CHARACTERISTICS—
POTENTIOMETER DIVIDER MODE
Differential Nonlinearity 3 DNL AD5251 –0.5 ±0.1 +0.5 LSB AD5252 –1.00 ±0.25 +1.00 LSB
Integral Nonlinearity 3
I
NL AD5251 –0.5 ±0.2 +0.5 LSB AD5252 –2.0 ±0.5 +2.0 LSB Voltage Divider Tempco (ΔV W /V W ) × 106/ΔT Code = half scale 25 ppm/°C Full-Scale Error V WFSE Code = full scale, V DD = 5.5 V, AD5251 –5 –3 0 LSB Code = full scale, V DD = 5.5 V, AD5252 –16 –11 0 LSB Code = full scale, V DD = 2.7 V, AD5251 −6 –4 0 LSB Code = full scale, V DD = 2.7 V, AD5252 –23 –16 0 LSB Zero-Scale Error V WZSE Code = zero scale, V DD = 5.5 V, AD5251 0 3 5 LSB Code = zero scale, V DD = 5.5 V, AD5252 0 11 16 LSB Code = zero scale, V DD = 2.7 V, AD5251 0 4 6 LSB Code = zero scale, V DD = 2.7 V, AD5252 0 15 20 LSB RES I STOR TERM I
NALS
Voltage Range 4
V A , V B , V W V SS V DD V
Capacitance 5
A, B C A , C B f = 1 kHz, measured to GND,
code = half scale
85 pF Capacitance 5
W C W f = 1 kHz, measured to GND,
code = half scale
95 pF Common-Mode Leakage Current I CM V A = V B = V DD /2 0.01 1 μA
安静的英语怎么说AD5251/AD5252
1 Typical values reprent average readings at 25°C and V DD = 5 V.
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum and minimum resistance wiper positions. R-DNL is the relative step change from an ideal value measured between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD52521 kΩ version at V DD =
2.7 V, I W = V DD/R for both V DD = 3 V and V DD = 5 V.
3 INL and DNL are measured at V W with the RDAC configured as a potentiometer divider, similar to a voltage output digital-to-analog converter. V A = V DD and V B = 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
4 Resistor Terminal A, Terminal B, and Terminal W have no limitations on polarity with respect to each other.
5 Guaranteed by design and not subject to production test.
6 Command 0 NOP should be activated after Command 1 to minimize I DD_READ current consumption.
油烟清洗7 P DISS is calculated from I DD × V DD = 5 V.
8 All dynamic characteristics u V DD = 5 V.
Rev. B | Page 4 of 28
AD5251/AD5252
10 kΩ, 50 kΩ, 100 kΩ VERSIONS
V DD = +3 V ± 10% or +5 V ± 10%, V SS = 0 V or V DD/V SS = ± 2.5 V ± 10%, V A = V DD, V B = 0 V, –40°C < T A < +85°C, unless otherwi noted.
Rev. B | Page 5 of 28
AD5251/AD5252
1 Typical values reprent average readings at 25°C and V DD = 5 V.
反邪教论文
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum and minimum resistance wiper positions. R-DNL is the relative step change from an ideal value measured between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD52521 kΩ version at V DD = 2.7 V,
I W = V DD/R for both V DD = 3 V and V DD = 5 V.
3 INL and DNL are measured at V W with the RDAC configured as a potentiometer divider, similar to a voltage output DAC. V A = V DD and V B = 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
4 Resistor Terminal A, Terminal B, and Terminal W have no limitations on polarity with respect to each other.
5 Guaranteed by design and not subject to production test.
6 Command 0 NOP should be activated after Command 1 to minimize I DD_READ current consumption.
7 P DISS is calculated from I DD × V DD = 5 V.中国象棋玩法
8 All dynamic characteristics u V DD = 5 V.
Rev. B | Page 6 of 28
