SCLK
CS
GND
DIN
H
W
VDD
L
W
L
CS
H
GND
VDD
DIN
SCLK
TPL0501 SLIS136A–SEPTEMBER2011–REVISED SEPTEMBER2011
256Taps Single Channel Digital Potentiometer With SPI Interface
Check for Samples:TPL0501
FEATURES
MicroQFN–RSE PACKAGE
•Single Channel,256-Position Resolution
(TOP VIEW)
•100kΩEnd-to-End Resistance Options
•Low Temperature Coefficient:35ppm/°C
•SPI-Compatible Serial Interface
• 2.7V to5.5V Single-Supply Operation
•±20%Resistance Tolerance
•Operating Temperature–40°C to125°C
•ESD Performance Tested per JESD22
–2000V Human Body Model(A114-B,Class
II)
SOT-23–DCN PACKAGE APPLICATIONS
(TOP VIEW)
•Adjustable Power Supplies
•Adjustable Gain Amplifiers and Offt
Trimming
成都必去的十大景点
•Precision Calibration of Set Point Thresholds
•Sensor Trimming and Calibration
•Mechanical Potentiometer Replacement
DESCRIPTION
The TPL0501is a single channel,linear-taper digital potentiometer with256wiper positions.This device can be ud as a three-terminal potentiometer or as a two-terminal rheostat.The TPL0501is currently offered with end-to-end resistance of100kΩ.
The internal registers of the TPL0501can be accesd using a SPI-compatible interface.The TPL0501has a nominal temperature coefficient of35ppm/°C.
The TPL0501is available in an8-pin SOT-23and8-microQFN package with a specified temperature range of–40°C to85°C.
ORDERING INFORMATION
TA PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING宇宙飞行器
microQFN-RSE TPL0501-100RSER7M –40°C to125°C Tape and Reel
SOT23–DCN TPL0501-100DCNR NF5T
(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at
/sc/package.
Plea be aware that an important notice concerning availability,standard warranty,and u in critical applications of Texas
Instruments miconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.Copyright©2011,Texas Instruments Incorporated Products conform to specifications per the terms of the Texas
Instruments standard warranty.Production processing does not
necessarily include testing of all parameters.
WA
GND
W
W
R WL =R TOT x D/256
R HW =
R TOT x (1–(D/256))
VOLTAGE DIVIDER MODE
RHEOSTAT MODE A
RHEOSTAT MODE B
Where D =Decimal Value of Wiper Code
Where D =Decimal Value of Wiper Code
Where D =Decimal Value of Wiper Code
W
W
OR
OR
V H V WL = (V H –V L )x D/256
V HW = (V H –V L )x (1–(D/256))
马可奥勒留TPL0501
SLIS136A –SEPTEMBER 2011–REVISED SEPTEMBER 2011
瓣组词
The devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
DIGITAL POTENTIOMETER CONFIGURATIONS
Figure 1.DPOT Configurations
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TPL0501 SLIS136A–SEPTEMBER2011–REVISED SEPTEMBER2011
PIN FUNCTIONS
PIN
NUMBER TYPE DESCRIPTION
NAME
DCN RSE
16W I/O Wiper terminal
27V DD Power Positive Supply Voltage
34GND Ground Ground
45SCLK Input SPI Clock
52DIN Input SPI Input
63CS Input SPI Chip Select.Active Low
78L I/O Low terminal
81H I/O High terminal
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)
over operating free-air temperature range(unless otherwi noted)
MIN MAX UNIT V DD to GND Supply voltage range–0.37V
V H,V L,V W–0.3V DD+0.3V
I H Pul current±20mA
I L
Continuous current TPL0501-100±5mA
I W
意味深长的句子V I Digital input voltage range–0.37V
RSE package
Package thermal
θJA°C/W impedance(4)DCN package
T stg Storage temperature range–65150°C (1)Stress above the ratings may cau permanent damage.Exposure to absolute maximum conditions for extended periods may
degrade device reliability.The are stress ratings only,and functional operation of the device at the or any other conditions beyond tho specified is not implied.
(2)The algebraic convention,whereby the most negative value is a minimum and the most positive value is a maximum
(3)All voltages are with respect to ground,unless otherwi specified.
(4)The package thermal impedance is calculated in accordance with JESD51-7.
ANALOG SPECIFICATIONS
Typical Values are specified at VDD=5V and operating temperature of25C
PARAMETER CONDITIONS MIN TYP MAX UNIT
End-to-end resistance(between Hi
R TOTAL80100120kΩand Li terminals)
V H,V L Terminal voltage range0VDD V
R H,R L Terminal resistance50150Ω
H terminal floating,V L=GND,
R W Wiper resistance25100Ω
Force I W=(V DD/2)/R TOTAL,Input code=0x80h
C H,C L Terminal capacitance15
f=1MHz,measured to GND,Input code=0x80h pF
C W Wiper capacitance12
V H=GND to V DD,V L=Floating OR
I LKG Terminal leakage current0.11uA
V L=GND to V DD,V H=Floating
TC R Resistance temperature coefficient35ppm/°C VOLTAGE DIVIDER MODE(V H=V DD,V L=GND,V W=Not Loaded)
INL Integral non-linearity–11LSB DNL Differential non-linearity–0.50.5LSB ZS ERROR Zero-scale error00.52LSB FS ERROR Full-scale error–2–0.50LSB
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TPL0501
SLIS136A–SEPTEMBER2011–REVISED
火急
ANALOG SPECIFICATIONS(continued)
Typical Values are specified at VDD=5V and operating temperature of25C
PARAMETER CONDITIONS MIN TYP MAX UNIT
T CV Ratiometric temperature coefficient Wiper t at mid-scale4ppm/°C BW Bandwidth Wiper t at mid-scale,TPL0501-100,C LOAD=10pF265kHz
T SW Wiper ttling time TPL0501-1003µS
V H=1V RMS at1kHz,
THD Total harmonic distortion0.005%
V L=V DD/2,measurement at W
RHEOSTAT MODE(Measurements between Wi and Li with Hi not connected,or between Wi and Hi with Li not connected)
RINL Integral non-linearity–11LSB RDNL Differential non-linearity–0.50.5LSB
R OFFSET Offt00.52LSB
Code=0x00h,L Floating,Input applied to W,10pF
RBW Bandwidth60kHz
on H
OPERATING SPECIFICATIONS
Typical Values are specified at VDD=5V and operating temperature of25C
PARAMETER CONDITIONS MIN TYP MAX UNIT
I DD(STBY)V DD Standby current0.38µA
I IN-DIG Digital pins leakage current(SCLK,DIN,CS inputs)–11µA
Digital Input=1.8V,VDD=2.7V5µA
I DD(SUPPL
V DD Supply Current
Y)Digital Input=1.8V,VDD=5V500µA SERIAL INTERFACE SPECS(SCLK,DIN,CS Inputs)
V IH Input high voltage V DD=2.7V to5.5V 1.8 5.5V
V IL Input low voltage SCLK,DIN,CS Inputs00.6V
C IN Pin capacitance SCLK,DIN,CS Inputs710pF SPI INTERFACE TIMING CHARACTERISTICS
血塞通分散片
f SCLK SCLK Frequency25MHz
t SCP SCLK Period40ns
t SCH SCLK High time20ns
t SCL SCLK Low time20ns
销售数据t DS DIN to SCLK tup time5ns
t DH DIN hold after SCLK5ns
t CSS CS Fall to SCLK ri tup time15ns
t CSW CS Pul width high40ns
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TPL0501
SLIS136A –SEPTEMBER 2011–REVISED SEPTEMBER 2011
TYPICAL CHARACTERISTICS
Figure 2.INL vs TAP POSITION (Potentiometer Mode)Figure 3.DNL vs TAP POSITION (Potentiometer Mode)
Figure 4.INL vs TAP POSITION (Rheostat Mode)Figure 5.DNL vs.TAP POSITION (Rheostat Mode)
Figure 6.End to End resistance change vs Temperature Figure 7.Zero Scale Error vs Temperature
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