UC2861-2868UC3861-3868
FEATURES
•Controls Zero Current Switched (ZCS)or Zero Voltage Switched (ZVS)Quasi-Resonant Converters •Zero-Crossing Terminated One-Shot
Timer
•Precision 1%, Soft-Started 5V Reference
•Programmable Restart Delay Following Fault •Voltage-Controlled Oscillator (VCO)
with Programmable Minimum and
Maximum Frequencies from 10kHz to 1MHz
•Low Start-Up Current (150µA typical)
•Dual 1 Amp Peak FET Drivers •UVLO Option for Off-Line or DC/DC
Applications
1953DESCRIPTION
The UC1861-1868family of ICs is optimized for the control of Zero Cur-rent Switched and Zero Voltage Switched quasi-resonant converters.Dif-ferences between members of this device family result from the various
combinations of UVLO thresholds and output options.Additionally,the one-shot pul steering logic is configured to program either on-time for ZCS systems (UC1865-1868),or off-time for ZVS applications (UC1861-1864).The primary control blocks implemented include an error amplifier to com-pensate the overall system loop and to drive a voltage controlled oscillator (VCO),featuring programmable minimum and maximum frequencies.Trig-gered by the VCO,the one-shot generates puls of a programmed maxi-mum width,which can be modulated by the Zero Detection comparator.This circuit facilitates “true”zero current or voltage switching over various
line,load,and temperature changes,and is also able to accommodate the resonant components' initial tolerances.
Under-Voltage Lockout is incorporated to facilitate safe starts upon
power-up.The supply current during the under-voltage lockout period is
typically less than 150µA,and the outputs are actively forced to the low state.
(continued)BLOCK DIAGRAM
Resonant-Mode Power Supply Controllers
Device
18611862186318641865186618671868UVLO 16.5/10.516.5/10.5360143601416.5/10.516.5/10.53601436014Outputs Alternating Parallel Alternating Parallel Alternating Parallel Alternating Parallel “Fixed”
Off Time
Off Time
Off Time
澳柯玛冰箱Off Time
On Time
On Time
On Time
On Time
ABSOLUTE MAXIMUM RATINGS
V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22V Output Current
Source or Sink (Pins 11 & 14). . . . . . . . . . . . . . . . . . . . .0.5A DC Pul (0.5µs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A Power Ground Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . .±0.2V Inputs (Pins 2, 3, 10, & 15). . . . . . . . . . . . . . . . . . . .–0.4 to 7V Error Amp Output Current . . . . . . . . . . . . . . . . . . . . . . . .±2mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1W Junction Temperature (Operating). . . . . . . . . . . . . . . . . .150°C Lead Temperature (Soldering, 10 conds). . . . . . . . . .300°C
All voltages are with respect to signal ground and all currents are positive into the specified terminal. Pin numbers refer to the J and N packages. Consult Unitrode Integrated Circuits da-tabook for information regarding thermal specifications and
limitations of packages.
CONNNECTION DIAGRAMS
DESCRIPTION (cont.)
UVLO thresholds for the UC1861/62/65/66are 16.5V (ON)and 10.5V (OFF),whereas the UC1863/64/67/68thresholds are 8V (ON)and 7V (OFF).After V CC ex-ceeds the UVLO threshold,a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage.
A Fault comparator rves to detect fault conditions and t a latch while forcing the output drivers low.The Soft-Ref pin rves three functions:providing soft start,re-start delay, and the internal system reference.
Each device features dual 1Amp peak totem pole output drivers for direct interface to power MOSFETS.The out-puts are programmed to alternate in the UC1861/63/65/67devices.The UC1862/64/66/68out-puts operate in unison alllowing a 2 Amp peak current.
ELECTRICAL CHARACTERISTICS Unless otherwi stated, all specifications apply for –55°C≤T A≤125°C for the
UC186x, –25°C≤T A≤85°C for the UC286x, and 0°C≤T A≤70°C for the UC386x, V CC=12V, C VCO=1nF, Range=7.15k, R MIN=86.6k, C=200pF, R=4.02k, and Csr=0.1µF. T A=T J .
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 5V Generator
Output Voltage12V≤Vcc≤20V, –10mA≤I O≤0mA 4.8 5.0 5.2V Short Circuit Current V O= 0V–150–15mA Soft-Reference
Restart Delay Current V = 2V102035µA Soft Start Current V = 2V–650–500–350µA Reference Volta
ge T J= 25°C, I O= 0A 4.95 5.00 5.05V
12V≤V CC≤20V, –200µA≤I O≤200µA 4.85 5.15V Line Regulation12V≤V CC≤20V220mV Load Regulation–200µA≤I O≤200µA1030mV Error Amplifier (Note 3)
Input Offt Voltage V CM= 5V, Vo = 2V, I O= 0A–1010mV Input Bias Current V CM= 0V–2.0–0.3µA Voltage Gain Vcm = 5V, 0.5V≤V O≤3.7V, I O= 0A70100dB Power Supply Rejection Ratio Vcm = 5V, V O= 2V, 12V≤V CC≤20V70100dB Error Amplifier (Note 3) (cont.)
有关送别的古诗Common Mode Rejection Ratio0V≤Vcm≤6V, V O= 2V65100dB V OUT Low V ID= –100mV, I O= 200µA0.170.25V V OUT High V ID= 100mV, I O= –200µA 3.9 4.2V Unity Gain Bandwidth(Note 4)0.50.8MHz Voltage Controlled Oscillator
打印机脱机怎么处理Maximum Frequency V ID(Error Amp) = 100mV, T J= 25°C450500550kHz
V ID(Error Amp) = 100mV425575kHz Minimum Frequency V ID(Error Amp) = –100mV, T J= 25°C455055kHz
V ID(Error Amp) = –100mV4258kHz One Shot
Zero Comparator Vth0.450.500.55V Propagation Delay(Note 4)120200ns Maximum Pul Width V ZERO= 1V85010001150ns Maximum to Minimum Pul V ZERO= 0V UCx861 – UCx864 2.54 5.5 Width Ratio V ZERO= 0V UCx865 – UCx868. –55°C to +85°C4 5.57
V ZERO= 0V UCx865 – UCx868, +125°C 3.8 5.57
Output Stage
Ri and Fall Time C LOAD= 1nF (Note 4)2545ns Output Low Saturation I O= 20mA0.20.5V
I O= 200mA0.5 2.2V
Output High Saturation I O= –200mA, down from Vcc 1.7 2.5V UVLO Low Saturation I O= 20mA0.8 1.5V Fault Comparator
Fault Comparator Vth 2.85 3.00 3.15V Delay to Output(Note 4) (Note 5)100200ns
ELECTRICAL CHARACTERISTICS Unless otherwi stated, all specifications apply for –55°C≤T A≤125°C for the
UC186x, –25°C≤T A≤85°C for the UC286x, and 0°C≤T A≤70°C for the UC386x, V CC=12V, C VCO=1nF, Range=7.15k, R MIN=86.6k, C=200pF, R=4.02k, and Csr=0.1µF. T A=T J .
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS UVLO
Vcc Turn-on Threshold UCx861, UCx862, UCx865, UCx8661516.518V
UCx863, UCx864, UCx867, UCx86878.09V Vcc Turn-off Threshold UCx861, UCx862, UCx865, UCx8669.510.511.5V
UCx863, UCx864, UCx867, UCx86867.08V Icc Start V CC= V CC(on) – 0.3V150300µA Icc Run V ID= 100mV2532mA
Note 1: Currents are defined as positive into the pin.
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Note 2: Pul measurement techniques are ud to insure that T J= T A.
外星猪Note 3: VID = V(NI) – V(INV).
Note 4: This parameter is not 100% tested in production but guaranteed by design.
放言五首其一Note 5: Vi = 0 to 4V tr(Vi)10ns tpd = t(Vo = 6V) – t(Vi = 3V)
UVLO&5V GENERATOR(See Figure1):When power is applied to the chip and Vcc is less than the upper UVLO threshold,Icc will be less than300µA,the5V gen-erator will be off, and the outputs will be actively held low.
When Vcc exceeds the upper UVLO threshold,the5V generator turns on.Until the5V pin exceeds4.9V,the outputs will still remain low.
The5V pin should be bypasd to signal ground with a 0.1µF capacitor.The capacitor should have low equiva-lent ries resistance and inductance.
FAULT AND SOFT-REFERENCE(See Figure1):The Soft-Ref pin rves three functions:system reference,re-start delay,and soft-start.Designed to source or sink 200µA,this pin should be ud as the input reference for the error amplifier circuit.This pin requires a bypass ca-pacitor of at least0.1µF.This yields a minimum soft-start time of 1ms.
Under-Voltage Lockout ts both the fault and restart de-lay latches.This holds the outputs low and discharges the Soft-Ref pin.After UVLO,the fault latch is ret by the low voltage on the Soft-Ref pin.
The ret fault latch rets the delay latch and Soft-Ref charges via the0.5mA current source.The fault pin is input to a high speed comparator with a threshold of3V.In the event of a detected fault,the fault latch is t and the outputs are driven low.If Soft-Ref is above4V,the delay latch is t.Restart delay is timed as Soft-Ref is discharged by20µA.When Soft-Ref is fully discharged,the fault latch is ret if the fault input signal is low.The Fault pin can be ud as a system shutdown pin.
If a fault is detected during soft-start,the fault latch is t and the outputs are driven low.The delay latch will re-main ret until Soft-Ref charges to4V.This ts the de-lay latch,and restart delay is timed.Note that restart delay for a single fault event is longer than for recurring faults since Soft-Ref must be discharged from5V instead of 4V.
The restart delay to soft-start time ratio is24:1for a fault occurring during normal operation and19:1for faults oc-curring during soft-start.Shorter ratios can be pro-grammed down to a limit of approximately3:1by the addition of a20kΩor larger resistor from Soft-Ref to ground.
A100kΩresistor from Soft-Ref to5V will have the effect of permanent shut down after a fault since the internal 20µA current source can't pull Soft-Ref low.This feature can be ud to require recycling Vcc after a fault.Care must be taken to insure Soft-Ref is indeed low at start up, or the fault latch will never be ret.
牛腱子做法APPLICATION INFORMATION
APPLICATION INFORMATION
