LM2645
LM2645 Advanced Two-Pha Switching Controller With Two Linear Outputs
Literature Number: SNVS155D
© 2011 National Semiconductor
200159 Version 5 Revision 5Print Date/Time: 2011/09/22 10:42:052645 Advanced Two-Pha Switching Controller With Two Linear Outputs二年级故事大全
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20015901
48-Lead TSSOP (MTD)
Order Number LM2645MTD
See NS Package Number MTD48
Pin Descriptions
VO1 (Pin 1):The feedback input for Channel 1. Always con-水煮鸡蛋要煮多久
孝经nect directly to the output. Fixed or adjustable output voltage
is lected by FB1_FIX.
FB1_FIX (Pin 2): The feedback input for tting the output
voltage of Channel 1. Connecting this pin to VLIN5 ts the
output voltage to 5V, or to the center of a voltage divider for
an adjustable output.
在晚上用英语怎么说COMP1 (Pin 3): Compensation pin for Channel 1. This is the
output of the internal transconductance amplifier. The com-
pensation network should be connected between this pin and
the signal ground, SGND.
LDODRV (Pin 4): The output of the adjustable linear regulator
爱国诗句名言
controller. Connects to the ba of a PNP Pass transistor.
报国诗句This pin is activated when Channel 1 is enabled.
NC (Pins 5, 9, 20): No internal connection. Connect the超拽
pins to ground.
LDOFB (Pin 6): Dual function input pin. When connected to
the center of a resistor divider, it rves as the 1.238V feed-
毕业生自我鉴定500字back input for the LDODRV. Connecting this pin to VLIN5
disables the LDODRV.
FPWM/2NDFB (Pin 7): Multi-function input pin. When held
HIGH (>2V), pul-skipping mode is enabled for both switch-
ing regulators. When held LOW (<0.8V), both regulators will
function in Fixed Frequency PWM mode. This pin can also be
connected to the center of a resistor divider for feedback reg-
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200159 Version 5 Revision 5Print Date/Time: 2011/09/22 10:42:05
200159 Version 5 Revision 5Print Date/Time: 2011/09/22 10:42:0545
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200159 Version 5 Revision 5
Print Date/Time: 2011/09/22 10:42:05
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200159 Version 5 Revision 5Print Date/Time: 2011/09/22 10:42:0545
