超薄HfO2高K栅介质中电场依赖的时变击穿(TDDB)特性

更新时间:2023-07-13 17:41:50 阅读: 评论:0

www.paper.edu
Stress Electric-Field Dependent TDDB
Characteristics of Ultra-Thin HfN/HfO2 Gate
Stack with 0.9 nm EOT
Hong Yang, Ning Sa, Jinfeng Kang*
Institute of Microelectronics, Peking University, Beijing 100871, P. R. China
*Email: kangjf@ime.pku.edu
公路工程施工
Abstract
In this paper, ultra thin CVD HfO2-gated nMOS capacitors (nMOSCs) with窗外雨
EOT~0.9 nm were fabricated. The time-dependent dielectric breakdown (TDDB)
characteristics of the 0.9 nm HfO2 gate stack were studied under constant voltage
stress (CVS). Area scaling consistent with Weibull statistics as in SiO2 was obrved
in the gate stack, demonstrating that intrinsic effects dominate time-dependent
dielectric breakdown (TDDB) characteristics of the ultra thin HfN/HfO2 gate stack.
卡特尔
For the first time, different TDDB characteristics under gate injection with low and
芸豆怎么炒好吃high CVS were demonstrated in the sub-1 nm EOT HfO2 gated devices. The results
show that interfacial layer initiated breakdown dominates the TDDB under low CVS
and HfO2 bulk initiated breakdown under high CVS. A new breakdown model is
propod to explain the new demonstrated TDDB characteristics.
Keywords: High K Gate Dielectric, Reliability, Time-Dependent Dielectric
Breakdown (TDDB), Constant Voltage Stress (CVS).
1Introduction
High-K gate dielectric will be required in the advanced CMOS devices to provide sufficient gate control with scaled equivalent oxide thickness (EOT) [1-6]. The reliability issues such as time-dependent dielectric breakdown (TDDB) under both gate injection and substrate injection need to be addresd when high K gate dielectrics are implemented in Si-CMOS technology [1-5]. It has been
www.paper.edu shown that there is an unavoidable interfacial layer (IL) between high-K bulk and Si substrates [6] and two possible breakdown mechanisms such as bulk initiated and IL initiated breakdown have been propod [2-4]. However, there are few papers to address the reliability of sub-1 nm EOT high K gate dielectrics [3]. Meanwhile, there are inconsistent pictures for the breakdown of high K gate stack such as IL initiated [2,7] or bulk initiated [4] breakdown having reported under gate injection. In this paper, nMOS capacitors with 0.9 nm EOT HfN/HfO2 gate stack were fabricated. The TDDB characteristics of theHfO2 gate stack of the 0.9 nm EOT devices were studied under gate injection in order to understand the breakdown mechanism of the high K gate stack. For gate injection IL initiated breakdown under low CVS and bulk initiated breakdown under high CVS were reported for the first time. A new breakdown model is propod to elucidate the TDDB characteristics measured in the sub-1 nm HfO2 gated devices under gate injection CVS.
2 Experiments
The nMOS capacitors (nMOSC) were fabricated on p-Si (100) substrates with 4~8 Ω-cm resistivity. After pre-gate cleaning, the HfO2 films were deposited by a MOCVD cluster tool without surface nitridation prior to HfO2 deposition [6]. After an in-situ post-deposition annealing (PDA) at 700°C in N2 for 1 minute, TaN/HfN metal gate stacks were ex-situ deposited on HfO2 layer by reactive sputtering pure Hf or Ta target in Ar+N2 mixed gas ambient. The thickness of the HfO2 film after PDA was about 3 nm measured by ellipsometry. After patterning gate, MOSC samples were then rapid thermal annealed (RTA) in N2 at 1000°C for 20c. An interfacial layer of 0.7~0.8 nm was formed between HfO2 layer and Si substrate [6]. Finally, the MOSC devices were subjected to back side Al metallization and the forming-gas annealing (FGA) at 420°C for 30min.
Capacitance-voltage (C-V) and leakage current (I-V) characteristics were measured by a HP4194A LCR meter and a HP 4156 miconductor parameter analyzer, respectively. Constant voltage stress was applied to evaluate the reliability. EOT of 0.9 nm and flat band voltage (V FB) of -0.45V were extracted by fitting the C-V measurements at 100 kHz with simulated C-V curves by UC Berkeley C-V simulation program [8], taking into account the quantum mechanical correction.
3Result and discussion
The area dependent TDDB characteristics of the HfN/HfO2 gated nMOSC were firstly studied.
Figure 1 shows the Weibull distributions of time-to-breakdown (t BD ) for 50×50 μm 2 and 100×100 μm 2 areas devices under negative CVS (Vg=-3.1V). The extracted slope (β) is 2.11 and 2.15 for 50×50 μm 2 and 100×100 μm 2 devices, respectively. The measured near constant slopes for the devices with different areas indicates that the intrinsic effects, not manufacturing-induced defects, dominate TDDB characteristics of the devices [1,9].
101001000
-3-2
-10
1L n (-L n (1-F ))Time(s)
Fig.1 Weibull distributions of time-to-breakdown (t BD ) for the HfN/HfO 2 gated nMOSC with 50×50
μm 2 and 100×100 μm 2 areas under -3.1V CVS gate injection.
Figure 2(a) shows TDDB characteristics of the nMOSC devices under different negative CVS. Under a low CVS (Vg=-2.0V) a smaller gate leakage jump was obrved in sample A when the first breakdown event occurred. Compared to this, a larger gate leakage jump was obrved in sample B when the first breakdown event occurred under a high CVS (CVS=-3.3V). After the first breakdown events had occurred under negative CVS, Time-Zero Dependent Breakdown (TZDB) measurements were then performed on the sample A and sample B, respectively. A larger gate leakage jump for sample A and lower gate leakage jump sample B were obrved during TZDB measurements (as shown in Fig. 2(b)). The results shown in Fig. 2(a) and Fig. 2(b) suggest that two different breakdown process, corresponding to the larger gate leakage jump and a lower gate leakage jump, respectively, occurred in both sample A and sample B. We could infer that the larger gate leakage jump is related to the bulk breakdown of HfO 2 layer and the lower gate leakage jump is related the IL breakdown. It is should be noted that hole trapping under high negative CVS and electron trapping
under low negative CVS, similar to the results reported in Ref. [4], are also obrved in the experiments (no shown herein).
-0.40.0
0.4
0.8
番茄龙利鱼怎么做1.2
1.6
2.0蜗牛卡通
2.4
101010
L n (|J |/V 2)V g -1(V )
ΔJ g /J g  (%)
T im e (S )
Fig. 2 (a) TDDB characteristics of HfN/HfO 2 gated nMOSCs under low CVS (Vg=-2V) for sample A and high CVS (Vg=-3.3 V) for sample B; (b) TZDB characteristics of the samples A and B after the
first breakdown events occur under low and high CVS.
101102103104105
-2-101
101001000
-3
4g技术-2
-101
L n (-L n (1-F ))Tim e(s) L n (-L n (1-F ))Tim e(s)
Fig. 3 Weibull distributions of time-to-breakdown (t BD ) for the HfN/HfO 2 gated nMOSC with
50×50 μm 2 areas under various CVS: (a) high CVS; (b) low CVS
In order to confirm this assumption, the Weibull distributions of time-to-breakdown (t BD) under both high CVS (Vg=-3.1V and Vg=-3.3V) and low CVS (Vg=-2.0V and Vg=-2.2V) were measured. Under high CVS, the obvious electric-field dependent Weibull slopes (β~2.97 for Vg=-3.1V and β~3.41 for Vg=-3.3V) were obtained in the sub-1 nm EOT HfO2 gate stack as shown in Fig. 3(a). The CVS dependent Weibull distribution slopes of t BD are the typical characteristics of bulk initiated TDDB [7]. In contrast to this, no electric-field dependent Weibull slopes (β~0.94 for both Vg=-2.0V and Vg=-2.2V) were obtained under low CVS as shown in Fig. 3(b), which suggest IL initiated breakdown will dominate the breakdown of HfO2 gate stack under a low CVS [4].
Bad on above results, a new breakdown model as shown in Fig. 4 is propod to elucidate the different TDDB characteristics of the ultra-thin HfO2 gate stack with sub-1 nm EOT under high and low negative CVS. In general, the dielectric breakdown is associated with the generation of traps and the charge trapping [10]. Under a high CVS, as shown in Fig. 4(a), the holes trapping injected fr
om substrate is dominant but occurs near to the HfO2/IL interface [4]. The electrons injected from gate electrode (HfN) go through HfO2 bulk layer by Fowler-Nordheim (FN) tunneling into conduction of HfO2 (process A to B) then go through IL layer by direct tunneling (process B to C). When the thickness of IL layer is only less than 1 nm, the injected electrons from conduction band of HfO2 easily go through the ultra thin IL layer by direct tunneling without causing charge traps. Thus, the electron trapping occurs in HfO2 bulk layer. In this ca, electron and holes trapping at different spatial sites will lead to distortion in the energy band of the high-K dielectrics that enhance the HfO2 bulk internal electric field and induce the HfO2 bulk initiated breakdown [4]. Whereas, under a low CVS, as shown in Fig. 4(b), electrons trapping is dominant and electrons injected from gate electrode (HfN) go through continuously HfO2 bulk (~3nm) and IL (~0.7nm) layers by direct tunneling or trap assisted tunneling. In this ca, the generation of electron traps both in HfO2 bulk and IL layers will be possible to occur. However, the electric field strength E IL in IL layer is significantly larger than one (E Bulk) in HfO2 bulk layer bad on the Gauss law εIL E IL=εBulk E Bulk, where εIL(~7-9) andεBulk (~24) [6] are the dielectric constants of IL and HfO2 layer. Thus, the electron trapping in IL layer is much easier than the bulk breakdown of HfO2 layer due to the higher electric field stress in IL. In this ca, the IL initiated breakdown will dominate the reliability, similar to the ca reported in Ref [1, 2].
The results indicate that IL initiated and HfO2 bulk initiated breakdown process will occur under low CVS and high CVS respectively when the IL layer is less than 1 nm.
www.paper.edu
Fig. 4 Band diagram structures of the HfN/HfO2 gate stack under CVS gate injection for (a) under high
CVS; (b) under low CVS.
4Conclusion
In this paper, the TDDB characteristics of HfN/HfO2 gate stack with sub-1 nm EOT were demonstrated under gate injection. The IL initiated breakdown under low CVS and HfO2 bulk initiated breakdown under high CVS were obrved, respectively. A new breakdown model is propod to explain the different TDDB characteristics under low and high CVS. The different TDDB characteristics imply that the conventional projection model of lifetime applied in single SiO2 gate oxide layer cannot be implemented to the high K gate stack.
ACKNOWLEDGMENT
This work is supported partly by NSFC (90407015), 973 Program (2006CB302700), and RFDP (20040001026).
References
[1] A. S. Oates, “Reliability Issues for High-K Gate Dielectrics,” in IEDM Tech. Dig., p.923-926, 2003.
[2] R. Degraeve, B. Kaczer, M. Houssa, G. Groeneken, M. Heyns, J. S. Jeon, A. Halliyal, “Analysis of high
voltage TDDB measurements on Ta2O5/SiO2 stack,” in IEDM Tech. Dig., p.327-330, 1999.
巴赫是谁[3] S. J. Lee, S. J. Rhee, R. Clark, D. L. Kwong,“Reliability Projection and Polarity Dependence of TDDB for
Ultra Thin CVD HfO2 Gate Dielectrics,” in Proc. Symp. VLSI Technol., p.78-79, 2002.
[4] Wei Yip Loh, Byung Jin Cho, Moon Sig Joo, M.F. Li, Daniel SH Chan, Shajan Mathew, Dim-Lee Kwong,

本文发布于:2023-07-13 17:41:50,感谢您对本站的认可!

本文链接:https://www.wtabcd.cn/fanwen/fan/89/1080097.html

版权声明:本站内容均来自互联网,仅供演示用,请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系,我们将在24小时内删除。

标签:工程施工   芸豆   公路   好吃
相关文章
留言与评论(共有 0 条评论)
   
验证码:
推荐文章
排行榜
Copyright ©2019-2022 Comsenz Inc.Powered by © 专利检索| 网站地图