NCL30161
Constant-Current Buck Regulator for Driving High Power LEDs
The NCL30161 is a hysteretic step−down, constant−current driver for high power LEDs. Ideal for industrial and general lighting applications utilizing minimal external components. The NCL30161 operates with an input voltage range from 6.3 V to 40 V. The hysteretic control gives good power supply rejection and fast respon during load transients and PWM dimming to LED arrays of varying number and type. A dedicated PWM input (DIM/EN) enables a wide range of puld dimming, and a high switching frequency allows the u of smaller external components minimizing space and cost. Protection features include resistor−programmed constant LED current, shorted LED protection, under−voltage and thermal shutdown. The NCL30161 is available in a DFN10 3 mm x 3 mm package.
Features
•VIN Range 6.3 V to 40 V
•Short LED Shutdown Protection: (NCL30161 Latching)
•No Control Loop Compensation Required
•Adjustable LED Current
•Single Pin Brightness and Enable/Disable Control Using PWM •Supports All−Ceramic Output Capacitors and Capacitor−less Outputs •Thermal Shutdown Protection
•Capable of 100% Duty Cycle Operation
•This is a Pb−Free Device TYPICAL Application
•LED Driver
•Constant Current Source •General Illumination •Industrial Lighting
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SENSE
Figure 1. Typical Application Circuit
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Device Package Shipping†
ORDERING INFORMATION
NCL30161MNTXG DFN10
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications, including part orientation and tape sizes, plea refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.
DFN10
CASE 485C
MARKING DIAGRAM
PIN CONNECTIONS
CS
NC
GND
VCC
GATE
VIN
ROT
DIM/EN 30161= Specific Device Code
A= Asmbly Location
L= Wafer Lot
Y= Year
W= Work Week
G= Pb−Free Package
30161
ALYW G
G
揭牌仪式流程方案(*Note: Microdot may be in either location)cf挑战
NC NC
(Top View)
PIN FUNCTION DESCRIPTION
Pin Pin Name Description Application Information
1CS Current Sen feedback pin Set the current through the LED array by connecting a resistor from this pin to
ground.
2, 4, 7NC No Connect
3GND Ground Pin Ground. Reference point for all voltages
5VCC Output of Internal 5 V linear
regulator The VCC pin supplies the power to the internal circuitry. The VCC is the out-put of a linear regulator which is powered from VIN. A 2 m F ceramic capacitor is recommended for bypassing and should be placed as clo as possible to the VCC and GND pins. Do not connect to an external load.
6R OT Initial Off−Time Setting
Resistor Resistor ROT from this pin to VCC ts the initial off−time range for the hys-teretic controller.
8DIM/EN PWM Dimming Control and
ENABLE Connect a logic−level PWM signal to this pin to enable/disable the power MOSFET and LED array
9VIN Input Voltage Pin Nominal operating input range is 6.3 V to 40 V. Input supply pin to the internal
circuitry and the positive input to the current n comparators. Due to high
frequency noi, a 10 m F ceramic capacitor is recommended to be placed as
clo as possible to VIN and power ground.
10GATE Driver Output Connect to the gate of the external MOSFET.
11FLAG Thermal flag. There is no electrical connection to the IC. Connect to ground
plane.
MAXIMUM RATINGS
Rating Symbol Min Max Unit VIN to GND VIN−0.340V Driver Output Voltage to GND GATE− 6.5V VCC to GND VCC−6V DIM/EN to GND DIM−0.36V CS to GND CS−0.36V ROT to GND ROT−0.36V Absolute Maximum junction temperature T J(MAX)150°C Operating Junction Temperature Range TJ−40125°C Storage Temperature Range T stg−55 to +125°C Thermal Characteristics
DFN10 3x3 Plastic Package
Maximum Power Dissipation @ T A = 25°C (Note 1)PD 1.46W Thermal Resistance Junction−to−Ambient (Note 2)R q JA86°C/W Lead Temperature Soldering (10 c):
Reflow (SMD styles only) Pb−Free (Note 3)
TL260°C Moisture Sensitivity Level (Note 4)MSL1−
Stress exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stress above the Recommended Operating Conditions may affect device reliability.怎么用电脑
1.The maximum package power dissipation limit must not be exceeded.
P D+T J(max)*T A
R q JA
2.When mounted on a multi−layer board with 35 mm2 copper area, using 1 oz Cu.
3.60−180 conds minimum above 237°C.
4.Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
ELECTRICAL CHARACTERISTICS (Unless otherwi noted: V IN = 12 V, T A = 25°C, unless otherwi specified.) Symbol Characteristics Min Typ Max Unit SYSTEM PARAMETERS
V IN Input Supply Voltage Range Normal Operation8.040V
Functional (Note 5) 6.3
I Q_IN Quiescent Current into V IN 1.5mA
V CC Internal Regulator Output (Note 6) 5.0V V UV+Under−Voltage Lock−out Threshold (V IN Rising) 5.5 6.0 6.5 V V UV−Under−Voltage Lock−out Threshold (V IN Falling) 5.2 5.6 6.3 V CURRENT LIMIT AND REGULATION
营销知识
V CS_UL CS Regulation Upper Limit
(CS Increasing, FET Turns−OFF)25°C213220226mV −40 to 125°C209231
V CS_LL CS Regulation Lower Limit
(CS Decreasing, FET Turns−ON)25°C174180186mV −40 to 125°C171189
VHYS CS Hysteresis35−45mV V OCP Over Current Protect Limit (Reference to CS Pin) 475500 525mV
F SW Switching Frequency Range (Note 7)2400kHz
C in_CS CS Pin Input Capacitance (Note 7) 4.0 5.0 6.0pF
t BLANKING CS Blanking Timer (Note 7)607390ns DIM INPUT
V PWMH/L PWM (DIM/EN) high level input voltage 1.4V V PWML PWM (DIM/EN) low level input voltage0.4V
I DIM−PU DIM/EN Pull−up Current 355065 m A
f pwm PWM (DIM/EN) dimmin
g frequency range0.120kHz
d max Maximum Duty Cycl
e (Note 7)100% MOSFET DRIVER
樽酒家贫只旧醅R GATE_Source Sourcing Current 4.59.013.5 W R GATE_Sink Sinking Current0.20.40.6W THERMAL SHUTDOWN
T SD Thermal Shutdown (Note 7)160165180 °C T Hyst Thermal Hysteresis (Note 7)304060°C OFF TIMER
t OFF−MIN Minimum Off−time 110137165ns 5.The functional range of V IN is the voltage range over which the device will function. Output current and internal parameters may deviate from
normal values for V IN and V CC voltages between 6.3 V and 8 V, depending on load conditions
6.V CC should not be driven from a voltage higher than V IN or in the abnce of a voltage at V IN.
7.Guaranteed by design.
Figure 2. Simplified Block Diagram
GATE
CS
VCC
ROT
GND
D1
SENSE
Figure 3. Typical Application Circuit To Drive Multiple LEDs (Buck)
Theory of Operation
This switching power supply is comprid of an inverted buck regulator controlled by a current mode, hysteretic control circuit. The buck regulator operates exactly like a conventional buck regulator except the power device placement has been inverted to allow for a low side power FET. Referring to Figure 1, when the FET is conducting, current flows from the input, through the inductor, the LED and the FET to ground.
When the FET shuts off, current continues to flow through the inductor and LED, but is diverted through the diode (D1). This operation keeps the current in the LED continuous with a continuous current ramp.
The control circuit controls the current hysteretically. Figure 2 illustrates the operation of this circuit. The CS comparator thresholds are t to provide a 10% current ripple. The peak current comparator threshold of 220 mV ts I peak at 10% above the average current while the valley current comparator threshold of 180 mV ts I valley at 10% below the average current.
When the FET is conducting, the current in the inductor ramps up. This current is nd by the n resistor that is connected from CS to ground. When the voltage on the CS pin reaches 220 m
V, the peak current comparator turns off the power FET. A conventional hysteretic controller would monitor the load current and turn the switch back on when the CS pin reaches 180 mV. But in this topology the current information is not available to the control circuit when the FET is off. To t the proper FET off time, the CS voltage is nd when the FET is turned back on and a correction signal is nt to the off time circuit to adjust the off time as necessary. When the FET is turned on, there can be a lot of ringing on the CS pin that would make the voltage on the CS pin be an unreliable measure of the current through the FET. An 85 ns blanking timer is started when the GATE voltage starts to go high, to allow this ringing to ttle down. At the end of this blanking timer, CS voltage is nd to determine
the valley current.
Figure 4. Typical Current Waveforms
The current wave shape is triangular, and the peak and valley currents are controlled. The average v
alue for a triangular wave shape is halfway between the peak and valley, so even with changes in duty cycle due to input voltage variations or load changes, the average current will remain constant.
Over Current Protection Feature
In the event there is a short−circuit across the LEDs, a large amount of current could potentially flow through the circuit during startup. To protect against this, the NCL30161 comes with a short circuit protection feature. If the voltage on the CS pin is detected to be greater than the over current protection limit, the NCL30161 will turn off the FET, and prevent the FET from turning on again until power is recycled to the NCL30161.
Undervoltage Lockout
When VIN ris above the UVLO threshold voltage, switching operation of the FET will begin. However, until the VIN voltage reaches 8 V, the VCC regulator may not provide the expected gate drive voltage to the FET. This could result in the R DS(on) of the FET being higher than expected or there not being enough gate drive capability to operate at the maximum rated switching frequency. For optimal performance, it is recommended to operate the part at a VIN voltage of 8 V or greater.
天上人间歌词
Setting The Output Current
The average output current is determined as being the middle of the peak and valley of the output current, t by the CS comparator thresholds. The nominal average output current will be the current value equivalent to 200 mV at the CS pin. The proper R SENSE value for a desired average output current can be calculated by:信阳景区
R SENSE+
200mV
I LED
PWM Dimming
For a given R SENSE value, the average output current, and therefore the brightness of the LED, can be t to a lower value through the DIM/EN pin. When the DIM/EN pin is brought low, the internal FET will turn off and switching will remain off until the DIM/EN pin is brought back into its high state.
By applying a puld signal to DIM/EN, the average output current can be adjusted to the duty ratio of the puld signal. It is recommended to keep the frequency of the DIM/EN signal above 100 Hz to
avoid any visible flickering of the LED.
