专利名称:GPU-bad RIP architecture
发明人:Qian, Lena,Downing, Andrew Peter,Warren, Zachary Theodore
眼睛化妆申请号:AU2012201865
申请日:20120329
公开号:AU2012201865A1
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朱时茂个人资料公开日:转呼啦圈
20131017
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摘要:#$%^&*AU2012201865A120131017.pdf> - 46 Abstract GPU-BASED RIP ARCHITECTURE 5 A method of rendering a document in page description language format using a plurality of graphics processing units (e.g., 138), is disclod. A document is converted to a t of rendering commands comprising a plurality of swathes, using at least one central processing unit (e.g., 105), each of the plurality of swathes being associated with a plurality of tiles. Each of the plurality of tiles is assigned to one of the plurality of graphics 10 processing units. The plurality of tiles reprenting the document is rendered using the assigned graphics processing units in parallel with one another, each of the rendered tiles having an attribute identifying the rendered tile. The plurality of rendered tiles are transmitted from the assigned graphics processing units to a print head controller (188), bypassing the central processing units (105). The rendered tiles are transmitted by the 15 graphics processing units (138) at a higher frequency than a frequency at which the plurality of tiles is output from the print head controller. At least one of the transmitted tiles is discarded, the discarded tile being identified by the print head controller (188) as a duplicate. Tiles are discarded until the print head controller (188) receives a complete swathe having the tiles associated with the swathe. The主张
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completed swathe is output from 20 the print head controller (188). P021516_specias filed (6142801v1)
申请人:Canon Kabushiki Kaisha
代理人:Spruson & Ferguson
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