ABSTRACT
Noi is an important factor in determining the nsitivity of CMOS imagers at low light levels. Both device or transistor thermal noi and l/f noi are contributing factors, correlated double sampling reduces the effect of both thermal noi and l/f noi but is less effective in reducing l/f noi as sampling time increas. Techniques to simulate noi in sampling circuits have only recently become available and are compared here to the older analytical techniques.
1. INTRODUCTION
CMOS imagers are becoming widely ud in commercial applications. One of the items of interest and practical considerations is noi which limits the low light level nsitivity. Both, device or transistor thermal noi and l/f noi are contributing factors, correlated double sampling, CDS, reduces the effect of both thermal noi and l/f noi but is less effective in reducing l/f noi as sampling time increas. There has not been a good understanding of device or transistor noi in the circuits 1 nor have there been convenient techniques available to simulate and analyze the read noi voltage at the output of the correlated double sampling n amplifiers. This report demonstrates the u of SpectreRF in simulating the read noi and compares the results to older analytical techniques 2.
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2. DEVICE MODELS
SpectreRF allows the ur to specify the noi model ud in simulating the noi behavior of a circuit using the noimod flag. There are four possible values that the noimod flag can take 1-4 and bad on this value, different noi models are ud in simulating the flicker and thermal noi in a circuit 2. In our simulations the noi model flag, noimod=1, for flicker and channel thermal noi was ud to simulate and analyze the noi behavior of the CDS circuit. The model ud by SpectreRF to calculate flicker noi is given as 3,
Flicker Noi = 2f f A f ds E ox eff K I C L f
(1)and thermal noi is calculated using the model 3,
Thermal Noi = 28()3D m ds mb kT i g g g =++ (2)
In Eqn. 1, the parameter K f is known as the flicker noi coefficient who value for 0.35µm process is typically 2.4 × 10-28. When using noimod=1 in SpectreRF, K f was specified to calculate output referred 1/f and thermal noi of the CDS circuit and the effect of channel thermal noi alone was calculated by tting Analysis and simulation of noi
in correlated double sampling imager circuits
Leonard Forbes, Harish Gopalakrishnan, and Weetit Wanalertlak
School of Electrical Engineering and Computer Science
Oregon State University, Corvallis, OR 97331-3211
, (541) 753-1409
Noi in Devices and Circuits III, edited by Alexander A. Balandin, François Danneville, M. Jamal Deen, Daniel M. Fleetwood, Proc. of SPIE Vol. 5844 (SPIE, Bellingham, WA, 2005) 0277-786X/05/$15 · doi: 10.1117/12.608761238
the value of K f as zero.
Fig. 1 shows the noi respon of a single 0.35 micron technology NMOS transistor with width 0.6um ,channel length 0.5um, and drain current 10uA in a common source configuration with a 100k Ω resistive load at the output. The flicker noi component is modeled by the double sided power spectral density function 2 , 2
2()F
n e e f f =(3)
and the channel thermal noi, or Johnson-Nyquist noi, having a uniform spectral density of e 2J-N is given by 2 ,
{}()
221c T c J N v f e e ωπ−∆−=−(4)
The plot gives the output referred noi spectral density in V 2/Hz and is ud to calculate e 2F and e 2J-N . The output noi due to the 1/f component decreas with frequency and flattens out at the 1/f noi corner , 10MhZ in Fig. 1. The output noi in V 2/Hz at frequency of 1Hz gives the value of e 2F (Eqn. 1) and, the output noi in V 2/Hz where the curve flattens gives the value of e 2J-N . From Fig. 1, we obtain the values e 2F = 20.42 × 10-9 and e 2J-N = 9.27 × 10-15 for the NMOS transistor with a gain of 4.5 (gm = 45 × 10-6S and R L = 100k Ω). Since the CDS circuit ud in our analysis has a unity gain source follower, we recalculate the values for e 2F = 1.0 × 10-9 and e 2J-N = 4.58 × 10-16, and u the in our calculations for computing 1/f noi and channel thermal noi of a CDS circuit.
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2. C ORRELATED D OUBLE S AMPLING C IRCUIT
The CDS circuit ud in our simulations is given in Fig. 2. It shows a source follower configuration that is most widely ud in the output stage of the pixel circuit of a CMOS active pixel nsor. The input of the source follower, M1, is connected to a photodiode who output voltage is proportional to the intensity of the light incident on it. The signal at the output of the source follower is sampled using the two switches M3 and M4. Both switches are controlled by a pul train having period initially of 2.2µs and pul width of 0.1µs. The delay, ∆T between the sampling times of the switches M3 and M4 is varied linearly from 0.5µs up to 4µs. To study the noi respon of the CDS circuit, output referred noi at the source of M2 is measured for different values of ∆T. A detailed description on the simulator tup ud in noi measurements and circuit analysis is given in the following ctions.
3. S IMULATION
圆形面积Traditional circuit simulators such as HSPICE or SWITCAP have limitations in switched bias and when ud in noi analysis of switched capacitor circuits. HSPICE, although capable of accounting for cond order effects (using transistor-level description) cannot accurately compute transfer and n
oi characteristics of a CDS circuit. SWITCAP simulators on the other are more dependable in computing noi and transfer characteristics but u high-level behavioral description of circuits and hence do not account for cond order effects 4. SpectreRF circuit simulator provides an excellent solution to directly measure noi and transfer characteristics of circuits using a transistor-level description 5. SpectreRF us the Periodic Steady State analysis (PSS) to first compute the periodic operating point of the circuit. The periodic operating point obtained using PSS analysis can then be ud to study the frequency respon of the circuit by running the Periodic AC analysis (PAC). Finally, the noi behavior of the circuit is analyzed using Periodic Noi analysis (Pnoi) which gives the output referred noi of the circuit.
The noi analysis tup is done using the ‘Analog Environment’ window from the ‘Tools’ menu. Using the tup menu the model libraries to be ud in circuit simulation is specified. In all our simulations TSMC 0.35µm process technology models were ud. The noi analysis options are t from the ‘Choo Proc. of SPIE Vol. 5844 239
Analysis’ menu in analog environment window. The buttons pss, pac and pnoi are lected to specify the
simulations parameters to be ud in the noi analysis of the circuit. For pss analysis, the fundamental
tones list box that gives all top-level tones in the circuit is auto filled from the ‘Frequency name for
1/period’ column entry in the Component Description Format of the clock signal sources, clk1 and clk2.
For the clock source, clk1, V1 is t to gnd (0V) and V2 t to V DD (+3.3V). For clock source, clk2, V1 and V2 are t to the same values as ‘clk1’ with a time delay of 1µs (this value is varied for different ∆T periods). The beat period is calculated from the reciprocal of the beat frequency from the fundamental tones list box by checking the auto calculate button. Since we are interested only in the output at the clock
frequency the number of harmonics is t to ‘0’. The errpret option is chon to be conrvative to give
higher accuracy in the circuit simulations although it increas simulation time considerably. To improve
convergence an additional stabilization time of 1.5 ms for circuit ttling was specified using the tstab
parameter. This results in the transient analysis being performed at least 1.5ms before the PSS analysis
attempts to calculate the steady state operation point. To study the frequency respon of the circuit a
logarithmic type sweep of frequency in the range of 1Hz – 10MHz was ud.
A maximum sideband value of 11 was ud in our simulations. This value for maximum sideband was
determined by increasing its value from the default value of 7, until its effect on the output noi is
negligible and the output noi stops changing for an increa in the maximum sideband value. Another
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important parameter ud in the periodic steady state analysis of a circuit is ‘maxacfreq’ that specifie
s the maximum ac frequency that will be ud in the subquent small-signal analys. This value should be t
such that maxacfreq ≥f stop + f clk × maxsideband where f clk is the clock frequency4 or, by running a pss
analysis without specifying maxacfreq and then, using the suggested value for maximum ac frequency
given by the warning statement in the noi analysis report for subquent simulations. In our simulations a
maximum ac frequency of 15 MHz was ud. A higher value for maxacfreq gives better accuracy but also
makes the simulations considerably slower.
As the first step, an AC analysis of the CDS circuit is performed in the frequency range to be ud in the
periodic steady state analysis of the circuit. The AC analysis is done to measure the -3db corner frequency (ωc) of the source follower transistor. The input voltage source is specified as Vin =1mV AC at the input to the source follower M1. To perform ac analysis one of the switches M3 and M4 are turned on by applying a
gate voltage equal to V DD (+3.3V). The frequency respon of the circuit is then obtained by plotting the
AC magnitude of the output signal at node 6. From Fig. 3, the corner frequency is given by the frequency at which the output drops from -62dB to -65dB and thus f c = 3.09 MHz, ωc is then given by 2πf c and is calculated to be 19.41 Mrad/c.
Fig. 4 gives the transient respon of the CDS circuit at node 6 (sampled value of the signal at node 5 by switching M3 at time intervals equal to the period of the clock signal clk1). The output referred 1/f noi at node 6 and node 7 is shown in Fig. 5. Note that the plot gives the distribution of 20log(V2 /Hz) in the frequency range of 1HZ – 10MHz. This plot is obtained by specifying node 6 (or node 7) as the positive output node and the negative output node as ground in the pnoi analysis output tup. To calculate the output referred 1/f noi sampled by the switches M3 and M4 between node
6 and node 7, we specify the positive output node as node 6 and the negative output node as node 7.
Fig. 6 gives the measured noi between node 6 and node 7 for ∆T = 1µs. The value of output referred 1/f noi and white noi (in volts DC ) is calculated by integrating the area under the curve within the limits of 1Hz to 1MHz and is calculated as 85µV for ∆T = 1µs.
4.KANSY’S A NALYTICAL M ODEL
Robert J. Kansy2 propod a model for determining the respon of a correlated double sampling circuit to
1/f noi and prented a universal curve to calculate the flicker noi and thermal noi of a CDS circuit for a given delay ∆T, knowing the -3dB cut-off frequency ωc . The graph, Fig. 7 gives the plot of mean square value of output noi normalized to 2e2F for the 1/f component and normalized to f c.e2J-N for the Johnson-Nyquist, channel thermal noi component as functions of the product ωc∆T. The y axis gives the value of V2/e20 where e20 = 2 e2F for 1/f noi and e20 = e2J-N for thermal noi. Thus in a CDS circuit, if ωc
240 Proc. of SPIE Vol. 5844
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and ∆T are known then, the DC value of output referred 1/f noi and DC value of output referred thermal noi can be estimated from the graph.
5. C OMPARISO N
To compare the value of 1/f and thermal noi calculated using Kansy’s model with simulated values for the CDS circuit, we measured the output referred 1/f noi and channel thermal noi for different ∆T values. For each, ∆T, the product ωc ∆T reprented one of the points on the x-axis of the graph. For each ∆T, the DC value of 1/f noi and channel thermal noi was hand calculated using the graph and compared with the value of 1/f and thermal noi obtained from the simulation using SpectreRF. The calculations for ∆T = 0.25µs are given below as an illustration.
For the unity gain source follower, 2F e = 1.00 × 10-9, 2J N e − = 4.58 × 10-16, c f = 3.09 × 106 Hz and, ωc = 20 × 106 rad/c. Calculated values using Kansy’s model when ∆T = 0.25µs and ωc ∆T = (20 ×106 × 0.25 × 10-6) = 5 are then:Johnson-Nyquist Component:
2
2c J N
V f e − = 3.25 (from graph)(5)
2V = 3.15 × (3.09 × 106 × 4.58 × 10-16 ) = 3.3 × 10-9(6)
V = 57.5 µV (7)1/f component:
2
22F
我的世界啪啪啪V e = 4.25 (from graph)(8)
2V = 4.25 × (2 × 1.00 × 10-9 ) = 8.51 x 10-9(9)
V = 92.2 µV (10)
Combination of 1/f component and white noi:
V = 108.7µV
Values obtained from the simulation using SpectreRF for ∆T = 0.25µs are:
Johnson-Nyquist component: V = 51.93 µV
1/f component and white noi: V = 76.1 µV
i开头的单词Fig. 8 gives the plot of simulated values of l/f and thermal noi in the CDS circuit compared with the Kansy’s model. Fig. 9 gives the plot of output referred white noi simulated in SpectreRF and the Kansy’s model ud in our hand calculations.
6. C ONCLUSIONS
A good comparison is obtained between simulations and analytical techniques except for larger sampling periods where l/f noi is dominant. For shorter sampling times it is apparent that device thermal noi is just as significant as l/f noi in contributing to imager read noi.Proc. of SPIE Vol. 5844 241
R EFERENCES
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Francisco, Feb. 2003.
[2]R.J. Kansy, “Respon of a Correlated Double Sampling Circuit to l/f Noi,” IEEE Journal of Solid-
State Circuits, vol. sc-15, no. 3, pp. 373-375, 1980.
[3]Design Systems Inc., “Affirma RF Simulator (Spectre RF) Ur Guide”,
v. 4.4.5, 1999.
[4]K. Kundert, “Simulating Switched-Capacitor Filters with SpectreRF,” v.4a,
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