Features
•Floating channel designed for bootstrap operation
Fully operational to 200V
Tolerant to negative transient voltage, dV/dt immune •Gate drive supply range from 10 to 20V •Undervoltage lockout for both channels •3.3V logic compatible
Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offt
•CMOS Schmitt-triggered inputs with pull-down •Shut down input turns off both channels
•Matched propagation delay for both channels •
Outputs in pha with inputs
HIGH AND LOW SIDE DRIVER东郭先生
Product Summary春节的英语单词
V OFFSET 200V max.I O +/- 3.0A / 3.0A typ.
会计报表附注模板V OUT 10 - 20V t on/off 95 & 65 ns typ.Delay Matching
15 ns max.
IR2010 (S )
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Data Sheet No. PD60195-A
Applications
查询IR2010 (S)供应商崎岖近义词
IR2010 (S
)
Note 1: Logic operational for V S of -4 to +200V. Logic state held for V S of -4V to -V BS .Note 2: When V DD < 5V , the minimum V SS offt is limited to -V DD.
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be ud within the recommended conditions. The V S and V SS offt ratings are tested with all supplies biad at 15V differential. Typical Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
(Plea refer to the Design Tip DT97-3 for more details).
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IR2010 (S两权分离
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Dynamic Electrical Characteristics
岗仁波齐
身手不凡V BIAS (V CC , V BS , V DD ) = 15V, C L = 1000 pF, T A = 25°C and V SS = COM unless otherwi specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Static Electrical Characteristics
V BIAS (V CC , V BS , V DD ) = 15V , T A = 25°C and V SS = COM unless otherwi specified. The V IN , V TH and I IN parameters are referenced to V SS and are applicable to all three logic input leads: HIN, LIN and SD. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
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IR2010 (S
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Lead Definitions
Symbol Description
14 Lead PDIP 16 Lead SOIC (Wide Body)
IR2010
IR2010S V DD Logic supply
HIN Logic input for high side gate driver output (HO), in pha SD Logic input for shutdown
LIN Logic input for low side gate driver output (LO), in pha V SS Logic ground
交通安全教育图片V B High side floating supply HO High side gate drive output V S High side floating supply return V CC Low side supply
LO Low side gate drive output COM
Low side return
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IR2010 (S
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Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit
Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
Figure 6. Delay Matching Waveform Definitions
Figure 5. Shutdown Waveform Definitions
(0 to 200V)
HIN LIN
SD
HO LO
HV =10 to 200V
<50 V/ns
