©2004 Fairchild Semiconductor Corporation
Rev.1.0.2
香港港口Features
创作动机•Internal Avalanche Rugged Sen FET
•Consumes only 0.65W at 240V AC & 0.3W load with Advanced Burst-Mode Operation •Frequency Modulation for low EMI •Precision Fixed Operating Frequency •Internal Start-up Circuit
•Pul by Pul Current Limiting •Abnormal Over Current Protection •Over V oltage Protection •Over Load Protection
•Internal Thermal Shutdown Function •Auto-Restart Mode •Under V oltage Lockout
•Low Operating Current (max 3mA)•Adjustable Peak Current Limit •Built-in Soft Start
Applications
•SMPS for STB, Low cost DVD •Auxiliary Power for PC •Adaptor for Charger
Description
The FSDx321(x stands for H, L) are integrated Pul Width Modulators (PWM) and Sen FETs specifically designed for high performance offline Switch Mode Power Supplies (SMPS) with minimal external components. Both devices are integrated high voltage power switching regulators which combine an avalanche rugged Sen FET with a cur-rent mode PWM control block. The integrated PWM con-troller features include: a fixed oscillator with frequency modulation for reduced EMI, Under V oltage Lock Out (UVLO) protection, Leading Edge Blanking (LEB), opti-mized gate turn-on/turn-off driver, Thermal Shut Down (TSD) protection, Abnormal Over Current Protection (AOCP) a
nd temperature compensated precision current sources for loop compensation and fault protection circuitry.When compared to a discrete MOSFET and controller or RCC switching converter solution, the FSDx321 reduce total component count, design size, weight and at the same time increa efficiency, productivity, and system reliability. Both devices are a basic platform well suited for cost effective designs of flyback converters.
Table 1.Notes: 1. Typical continuous power in a non-ven-tilated enclod adapter measured at 50°C ambient. 2. Maximum practical continuous power in an open frame design at 50°C ambient. 3. 230 VAC or 100/115 VAC with doubler.
Typical Circuit
OUTPUT POWER TABLE
PRODUCT 230VAC ±15%(3)85-265VAC Adapt-er (1)Open Frame (2)Adapt-er (1)Open Frame (2)FSDL32111W 17W 8W 12W FSDH32111W 17W 8W 12W FSDL0165RN 13W 23W 11W 17W FSDM0265RN 16W 27W 13W 20W FSDH0265RN 16W 27W 13W 20W FSDL0365RN 19W 30W 16W 24W FSDM0365RN 19W 30W 16W 24W FSDL321L 11W 17W 8W 12W FSDH321L 11W 17W 8W 12W FSDL0165RL 13W 23W 11W 17W FSDM0265RL 16W 27W 13W 20W FSDH0265RL 16W
27W 13W 20W FSDL0365RL 19W 30W 16W 24W FSDM0365RL
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没有眉毛的女人19W
30W
16W
24W
FSDH321, FSDL321
Green Mode Fairchild Power Switch (FPS TM )
FSDH321, FSDL321
Internal Block Diagram
Figure 2.Functional Block Diagram of FSDx321 2
FSDH321, FSDL321
大熊猫介
3
Pin Definitions
Pin Configuration
Figure 3.Pin Configuration (Top View)
Pin Number
Pin Name Pin Function Description
1
GND
Sen FET source terminal on primary side and internal control ground.2Vcc
Positive supply voltage input. Although connected to an auxiliary transform-er winding, current is supplied from pin 5 (Vstr) via an internal switch during startup (e Internal Block Diagram ction). It is not until Vcc reaches the UVLO upper threshold (12V) that the internal start-up switch opens and de-vice power is supplied via the auxiliary transformer winding.
3Vfb
The feedback voltage pin is the non-inverting input to the PWM comparator.It has a 0.9mA current source connected internally while a capacitor and op-tocoupler are typically connected externally. A feedback voltage of 6V trig-gers over load protection (OLP). There is a time delay while charging between 3V and 6V using an internal 5uA current source, which prevents fal triggering under transient conditions but still allows the protection mechanism to operate under true overload conditions.
4Ipk
Pin to adjust the current limit of the Sen FET. The feedback 0.9mA current source is diverted to the parallel combination of an internal 2.8k Ω resistor and any external resistor to GND on this pin to determine the current limit.If this pin is tied to Vcc or left floating, the typical current limit will be 0.7A.5Vstr
This pin connects directly to the rectified AC line voltage source. At start up the internal switch supplies internal bias and charges an external storage capacitor placed between the Vcc pin and ground. Once the Vcc reaches 12V, the internal switch is disabled.
6, 7, 8Drain
The Drain pin is designed to connect directly to the primary lead of the trans-former and is capable of switching a maximum of 650V. Minimizing the length of the trace connecting this pin to the transformer will decrea leak-age inductance.
FSDH321, FSDL321
Absolute Maximum Ratings
(Ta=25°C, unless otherwi specified)
Parameter Symbol Value Unit Maximum Vstr Pin Voltage V STR,MAX650V Maximum Drain Pin Voltage V DRAIN,MAX650V Drain-Gate Voltage (R GS=1MΩ)V DGR650V Gate-Source (GND) Voltage V GS±20V Drain Current Puld (1)I DM 1.5A DC Continuous Drain Current (Tc=25°C)I D0.7A DC Continuous Drain Current (Tc=100°C)I D0.32A DC Single Puld Avalanche Energy (2)E AS10mJ Maximum Supply Voltage V CC,MAX20V Input Voltage Range V FB−0.3 to Vstop V Total Power Dissipation P D 1.25W Operating Junction Temperature.T J+150°C Operating Ambient Temperature.T A-25 to +85°C Storage Temperature Range.T STG-55 to +150°C
Note:
1.Repetitive rating: Pul width limited by maximum junction temperature愿将腰下剑直为斩楼兰
2.L=24mH, starting Tj=25°C
4
FSDH321, FSDL321
5
Electrical Characteristics (Sen FET Part)
(Ta = 25°C unless otherwi specified)Note:社保查询个人>儿歌顺口溜
1. Pul test: Pul width ≤ 300µS, duty ≤ 2%
2. Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Sen FET SECTION
Drain-Source Breakdown Voltage BV DSS V GS =0V, I D =50µA 650720-V Startup Voltage (Vstr) Breakdown
BV STR V CC =0V, I D =1mA 650720-V Zero Gate Voltage Drain Current I DSS
V DS =Max. Rating, V GS =0V
--25µA V DS =0.8Max. Rating,V GS =0V, T C =125°C --200µA Static Drain-Source on Resistance
(Note)
R DS(ON)V GS =10V, I D =0.5A -1419ΩForward Trans conductance (Note)gfs V DS =50V, I D =0.5A 1.0 1.3-S
Input Capacitance C ISS V GS =0V, V DS =25V,f=1MHz
-162-pF Output Capacitance
C OSS -18-Rever Transfer Capacitance C RSS - 3.8-Turn on Delay Time td(on)V D
D =0.5B V DSS , I D =1.0A
(MOSFET switching time is esntially independent of
operating temperature)-9.5-ns Ri Time
tr -19-Turn Off Delay Time td(off)-33-Fall Time
tf -42-Total Gate Charge
(Gate-Source + Gate-Drain)Qg V GS =10V, I D =1.0A, V DS =0.5B V DSS
(MOSFET switching time is esntially
independent of operating temperature)
-7.0-nC Gate-Source Charge Qgs - 3.1-Gate-Drain (Miller) Charge
Qgd
-0.4
-S 1R
-
--=
