Decision feedback equalizer (DFE) for jitter reduc

更新时间:2023-06-28 05:53:26 阅读: 评论:0

专利名称:Decision feedback equalizer (DFE) for jitter
reduction
电脑估价发明人:Ognjen Katic
申请号:US11074966
申请日:20050308
公开号:US07242712B1
公开日:
20070710
专利内容由知识产权出版社提供
专利附图:
摘要:A decision feedback equalizer (DFE) for a receiver that can reduce jitter is disclod. The DFE us an equalizer structure that employs a symbol samplingiorange
operation at a decision device, also known as a slicer. In a receiver, the pha of a signal,
such as an equalized signal, is typically estimated from zero crossings in the clock recovery operation. Fluctuations in the zero crossings makes pha of the reproduced clock unstable, which decreas error performance in an associated receiver. Embodiments advantageously align inter-symbol interference (ISI) canceling terms from a feedback filter (FBF) relatively well, and thereby provide equalization of a relatively large portion of a symbol period. This advantageously stabilizes the pha of an equalized signal and reduces jitter.
申请人:Ognjen Katic
服务心得地址:Vancouver CA
糖的成语国籍:CA影视艺术概论
代理机构:Knobbe Martens Olson & Bear LLP电脑全屏壁纸
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