GENERAL DESCRIPTION
OB2279 is a highly integrated current mode PWM control IC optimized for high performance, low standby power and cost effective offline flyback converter applications. PWM switching frequency at normal operation is externally programmable and trimmed to tight range. At no load or light load condition, the IC operates in extended ‘burst mode’ to minimize switching loss. Lower standby power and higher conversion efficiency is thus achieved. VDD low startup current and low operating current contribute to a reliable power on startup design with OB2279. A large value resistor could thus be ud in the startup circuit for reduced power loss. The internal slope compensation improves system large signal stability and reduces the possible sub-harmonic oscillation at high PWM duty cycle output. Leading-edge blanking on current n input removes the signal glitch due to snubber circuit diode rever recovery and greatly reduces the external
component count and system cost in the design.
OB2279 offers comprehensive protection coverage
including Cycle-by-Cycle current limiting(OCP),
VDD Under Voltage Lockout(UVLO), VDD Over
Voltage Protection(OVP), VDD Clamp, Gate Clamp,
Over Load protection(OLP) and Over Temperature
protection (OTP), etc.
Different latch shutdown options are offered on
OB2279 in different device version. V version has OVP Latch shutdown. T version supports both OVP and OTP latch shutdown. L version provides all OVP, OTP and OLP latch shutdown control. Excellent EMI performance is achieved with On-Bright proprietary frequency shuffling technique together with soft switching control at the totem pole gate drive output. Tone energy at below 20KHZ is minimized in operation. Conquently, audio noi is eliminated during operation.
OB2279 is offered in SOP-8 and DIP-8 packages.
FEATURES
■ On-Bright Proprietary Frequency Shuffling Technology for Improved EMI Performance ■ Power On Soft Start
■ Extended Burst Mode Control For Improved Efficiency and Minimum Standby Power Design ■ Audio Noi Free Operation
■ External Programmable PWM Switching Frequency ■ Internal Synchronized Slope Compensation
■ Low VIN/VDD Startup Current(3uA) and Low Operating Current (2.3mA)
■ Leading Edge Blanking on Current Sen Input ■ Complete Protection Coverage with lective protections for Latch Shutdown o VDD Over Voltage Protection(OVP) – Latch上海医保政策
Shutdown o Over Temperature Protection(OTP) – Auto recovery or Latch Shutdown
o Over Load Protection. (OLP) – Auto recovery or Latch Shutdown o VDD Under Voltage Lockout with Hysteresis (UVLO) o Gate Output Voltage Clamp (16.5V) o Built-in OCP Compensation to Achieve Minimum OPP Variation over Universal AC Input Range. APPLICATIONS
Offline AC/DC flyback converter for ■ Adaptor ■ Notebook Adaptor ■ LCD Monitor/TV/PC/Set-Top Box Power
Supplies
■ Open-frame SMPS ■ Printer Power TYPICAL APPLICATION
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GENERAL INFORMATION
Pin Configuration
The pin map of OB2279 in DIP8 and SOP8 package is shown as below.
Ordering Information Part Number Description OB2279AP-V DIP8, V version with OVP
Latch
OB2279AP-T DIP8, T version with
OVP/OTP latch
OB2279AP-L DIP8, L version with
OVP/OTP/OLP latch
OB2279CP-V SOP8, V version with OVP
latch
OB2279CP-T SOP8, T version with
OVP/OTP latch
OB2279CP-L
SOP8, L version with OVP/OTP/OLP latch
Note: All Devices are offered in Pb-free Package if not otherwi
noted.
Package Dissipation Rating Package
R θJA (°C/W)
DIP8 90 SOP8 150
Absolute Maximum Ratings
Parameter Value VDD Clamp Voltage 35 V VDD Clamp Continuous Current
10 mA V FB Input Voltage -0.3 to 7V V SENSE Input Voltage to Sen Pin
-0.3 to 7V V RT Input Voltage to RT Pin -0.3 to 7V V RI Input Voltage to RI Pin -0.3 to 7V Min/Max Operating Junction Temperature T J
-20 to 150 o C Min/Max Storage Temperature T stg
-55 to 150 o C Lead Temperature (Soldering, 10cs)
260 o C Note: Stress beyond tho listed under “absolute maximum
ratings” may cau permanent damage to the device. The are stress ratings only, functional operation of the device at the or any other conditions beyond tho indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability.
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Marking Information
TERMINAL ASSIGNMENTS
Pin Num Pin Name I/O Description 1 GND P Ground 2 FB I Feedback input pin. PWM duty cycle is determined by voltage level into this
pin and current-n signal level at Pin 6.
3 VIN I Connected through a large value resistor to rectified line input for Startup
and line voltage nsing.
4 RI I Internal Oscillator frequency tting pin. A resistor connected between RI
and GND ts the PWM frequency.
5 RT I Dual function pin. Either connected through a NTC resistor to GND for over
temperature shutdown control or ud as latch shutdown control input.
6 SENSE I Current n input pin. Connected to MOSFET current nsing resistor
node.
7 VDD P DC power supply pin. 8 GATE O Totem-pole gate drive output for power MOSFET.
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BLOCK DIAGRAM
RECOMMENDED OPERATING CONDITION
Symbol Parameter Min Max
Unit
VDD VDD Supply Voltage 11.5 25 V RI RI Resistor Value 100 133 Kohm T A Operating Ambient Temperature
-20 85
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ELECTRICAL CHARACTERISTICS
(T A = 25O C if not otherwi noted)
Symbol Parameter Test Conditions Min Typ Max Unit Supply Voltage (VDD) I_VDD_Startup VDD Start up Current VDD =15V, RI=100K Measure current into VDD
3 20 uA
I_VDD_Ops Operation Current VDD =16V, RI=100Kohm, V FB =3V
2.3 mA
UVLO(Enter) VDD Under Voltage Lockout Enter
8.8 9.8 10.8 V
UVLO(Exit) VDD Under Voltage Lockout Exit (Startup)
15.5 16.5 17.5 V
男士健康OVP(Latch)
VDD Over Voltage Latch Trigger
26.5 28 29.5 V
OVP(De-Latch) VDD Latch Relea Voltage Threshold
7.5 V
I(Vdd)_latch VDD bleeding current at latch shutdown when VDD = 9V
45 uA T D _OVP VDD OVP Debounce time
RI = 100Kohm 80 uSec
V DD _Clamp V DD Zener Clamp Voltage RI = 100 Kohm, I(V DD ) = 5 mA
35 V
T_Softstart Soft Start Time 3 mSec Feedback Input Section(FB Pin)
A VCS PWM Input Gain ΔV F
B /ΔV cs
2.8 V/V V FB_Open V FB Open Voltage VDD = 16V 6.2
V
I FB _Short FB pin short circuit current Short FB pin to GND, measure current
陶铸中学0.75 mA
V TH _0D Zero Duty Cycle FB Threshold Voltage VDD = 16V, RI=100Kohm
0.95 V
V TH _BM Burst Mode FB Threshold Voltage
1.6 V
V TH _PL Power Limiting FB Threshold Voltage
4.4 V
T D _PL Power limiting Debounce Time VDD = 16V, RI=100Kohm
80 mSec
Z FB _IN Input Impedance 9.0 Kohm Current Sen Input(Sen Pin) T_blanking Sen Input Leading Edge Blanking Time
RI = 100Kohm 300 nSec
Z SENSE _IN Sen Input Impedance
30 Kohm
T D _OC Over Current Detection and Control Delay
CL=1nf at GATE, RI=100Kohm 70 nSec
V TH _OC_0 Current Limiting
Threshold at No
Compensation
VDD = 16V, I(VIN) = 0uA, RI=100Kohm 0.85 0.90 0.95 V O n -
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