CML Microcircuits
C O M M U N IC A TIO N SEM IC O N
D U C T O R S
一年级上册英语CMX994
空气开关原理Direct Conversion
Receiver
© 2012 CML Microsystems Plc D/994/12 May 2012
Provisional Issue
Features
Applications
∙
Rx Direct Conversion Receiver
o Direct conversion eliminates image
respons
o LNA with gain control
o 100MHz to 940MHz I/Q demodulator o Extended low frequency operation –
down to 50MHz
o Preci filtering with bandwidth tting
and 1:2:4 bandwidth modes ∙
Local Oscillator o LO synthesir
o VCO negative resistance amplifier o LO divide by 2, 4 or 6 modes o Tx LO Output
∙ 3.0V – 3.6V Low-power Operation ∙ Small size 40-pin VQFN Package ∙
Low-power Mode
∙ Analogue/digital multimode radio ∙ Software Defined Radio (SDR) ∙ Data telemetry modems ∙ Satellite communications
∙ Constant envelope and linear Rx modulation
∙ Rx function compatible with CMX998 Cartesian Feedback Loop Transmitter
∙ Narrowband: e.g. 25kHz, 12.5kHz, 6.25kHz ∙ Wideband Data
1 Brief Description
The CMX994 is a direct conversion receiver IC. It includes a broadband LNA with gain control followed by a high dynamic range I/Q demodulator. The receiver baband ction includes amplifiers and preci baband filter stages. LO generation is provided by an integer-N PLL and a VCO negative resistance amplifier; an external LO may also be ud. LO dividers are provided for flexible multi-band operation. The device operates from a single 3.3V supply over a temperature range of –40°C to +85°C and is available in a small 40-pin VQFN (Q4) package.
CONTENTS
Section Page
1Brief Description (1)
1.1History (4)
2Block Diagram (5)
3Pin and Signal Lists (6)
3.1Pin List (40-pin (Q4) Package) (6)
3.2Signal Definitions (7)
4External Components (8)
4.1Power Supply and Decoupling (8)
4.2Receiver (9)
4.2.1LNA (9)
4.2.2Mixers and Baband Section (13)
4.3Local Oscillator (14)
4.3.1Local Oscillator Input (14)
4.3.2VCO and PLL (14)
中药方
4.4RESETN (16)
5General Description (17)
5.1General Operation (18)
王者名字大全女5.1.1Rx/Tx Enable (18)
5.2Receiver Operation (18)
5.2.1DC Offt Correction (18)
5.2.2Receiver Filters and Bandwidth Options (19)
5.2.3Baband Filter Design and Required Correction (20)
5.2.4Operation at Wider Bandwidths (21)
5.3Local Oscillator Operation (22)
5.3.1PLL (22)
5.3.2PLL Enable (23)
6C-BUS Interface and Register Descriptions (24)
6.1General Ret Register (25)
炒红薯粉6.1.1General Ret Register: C-BUS address $10 (25)
6.2General Control Register (26)
6.2.1General Control Register: C-BUS address $11 (26)
6.2.2General Control Register: C-BUS address $E1 (26)
6.3Rx Control Register (27)
6.3.1Rx Control Register: C-BUS address $12 (27)
6.3.2Rx Control Register: C-BUS address $E2 (27)
6.4Rx Offt Register (28)
6.4.1Rx Offt Register: C-BUS address $13 (28)
6.4.2Rx Offt Register: C-BUS address $E3 (28)
6.5Intermodulation Control Register (29)
6.5.1IM Control Register: C-BUS address $14 (29)
6.5.2IM Control Register: C-BUS address $E4 (29)
6.6Rx Gain Register (30)
6.6.1Rx Gain Register: C-BUS address $16 (30)
6.6.2Rx Gain Register: C-BUS address $E6 (31)
6.7PLL M Divider Register (31)
6.7.1PLL M Divider Register: C-BUS Address $22-$20 (31)
6.7.2PLL M Divider Register: C-BUS Address $D2-$D0 (31)
6.8PLL R Divider Register (32)
6.8.1PLL R Divider Register: C-BUS Address $24-$23 (32)
2012 CML Microsystems Plc 2 D/994/12
6.8.2PLL R Divider Register: C-BUS Address $D4-$D3 (32)
6.9VCO Control Register (32)
6.9.1VCO Control Register: C-BUS address $25 (32)
6.9.2VCO Control Register: C-BUS address $D5 (33)
7Application Notes (34)
7.1General (34)
7.2Receiver Compensation (34)
7.3Typical Receiver Performance (34)
7.3.1System Performance (34)
7.3.2DC Offts (35)
7.3.3Gain Control (36)
7.3.4LNA Intermodulation Optimisation (40)
7.3.5Low Power Mode (40)
7.3.6I/Q Filter Respon (40)
7.4Operation below 100MHz (42)
7.5Transmitter LO Output (43)
8Performance Specification (44)
8.1Electrical Performance (44)
8.1.1Absolute Maximum Ratings (44)
8.1.2Operating Limits (44)
8.1.3Operating Characteristics (45)
8.2Packaging (53)
Table Page Table 1 Definition of Pin Names and Functions (6)
Table 2 Definition of Power Supply and Reference Voltages (7)
Table 3 Decoupling Components (8)
Table 4 LNA S11 and S22 Impedances and Parallel Equivalent Circuit in 50Ω mode. (10)
Table 5 LNA S11 and S22 Impedances and Parallel Equivalent Circuit in 100Ω mode. (11)
Table 6 150MHz LNA and Inter-stage Components (100Ω output mode) (12)
Table 7 450MHz LNA and Inter-stage Components (100Ω output mode) (12)
Table 8 900MHz LNA and Inter-stage Components (50Ω output mode) (12)
Table 9 Rx Mixer Input Impedances and Parallel Equivalent Circuit (13)
Table 10 Receiver Components (14)
Table 11 Internal VCO Amplifier Tank Circuit for 440MHz Operation (15)
Table 12 3rd Order Loop Filter Circuit Values (16)
Table 13 Tx (or Rx) Enable Operation (18)
Table 14 DC Offt Correction Adjustments (19)
Table 15 PLL Control (23)
Table 16 Typical LNA Gain Step Sizes at 100MHz, Z O=100Ω (37)
Table 17 Typical LNA Gain Step Sizes at 450MHz, Z O=100Ω (38)
Table 18 Typical LNA Gain Step Sizes at 940MHz, Z O=50Ω (39)
Table 19 50MHz LNA and Inter-stage Components (100Ω output mode) (42)
Table 20 Summary of Results for the Complete Rx Chain at 50MHz (42)粉丝鸡汤
Figure Page Figure 1 Block Diagram (5)
Figure 2 Recommended Power Supply Connections and Decoupling (8)
Figure 3 LNA S11 (9)
Figure 4 LNA S22 (9)
Figure 5 LNA S11 (11)
Figure 6 LNA S22 (11)
Figure 7 Recommended LNA Configuration and Inter-stage Match (12)
Figure 8 Rx Mixer Input Impedance (13)
Figure 9 Recommended Receiver Circuit (14)
Figure 10 Example External Components – VCO External Tank Circuit (15)
Figure 11 Example External Components – PLL Loop Filter (16)
Figure 12 Simplified Schematic of How DC Offt Corrections are Applied (18)
Figure 13 Baband I/Q Filtering (19)
卤五花肉Figure 14 Schematic Reprentation of Filters ud in the I and Q Paths (20)
Figure 15 CMX994 Local Oscillator (22)
Figure 16 C-BUS Transactions (25)
Figure 17 CMX994 and CMX7164FI-2 Typical 4-FSK Sensitivity (19.2kbps) (35)
Figure 18 CMX994 Gain Control (36)
Figure 19 Variation of LNA Gain and IMD with IM register tting, 450 MHz (40)
Figure 20 I/Q Filter Respon (41)
陈安之名言Figure 21 Typical Gain and NF variation of demodulator stages at low frequencies (42)
Figure 22 Tx Output Level vs. Frequency (43)
Figure 23 C-BUS Timing (52)
Figure 24 Q4 Mechanical Outline: (53)
1.1 History
It is always recommended that you check for the latest product datasheet version from the CML website: [].
2 Block Diagram
Figure 1 Block Diagram
