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Demand for flip chip interconnect technology is being driven by
a number of factors from all corners of the silicon industry. To
support this demand, Amkor is committed to being the leading
provider of Flip Chip in Package (FCiP) technology. By partnering
with proven industry leaders, Amkor has brought high volume
packaging and asmbly to the subcontract market.
fc BGA,
Flip Chip production capability exists in our Philippines, Korea,
Taiwan, and China factories. Wafer Bumping, Wafer Level
Packaging (WLP), and Flip Chip packaging solutions are qualified
in lead-free options.
What is Flip Chip?
Flip Chip (FC) is not a specific package (like SOIC), or even a package type (like BGA). Flip Chip describes the
bonded first to the die, then looped and bonded to the carrier.
t
平凡的世界书Reduced signal inductance - becau the interconnect is MUCH shorter in length (0.1 mm vs 1-5 mm),
the inductance of the signal path is greatly reduced. This is a key factor in high speed communication
Reduced power/ground inductance - by using flip chip interconnect, power can be brought directly into
the core of the die, rather than having to be routed to the edges. This greatly decreas the noi of the
Higher signal density - the entire surface of the die can be ud for interconnect, rather than just the
edges. This is similar to the comparison between QFP and BGA packages. Becau flip chip
Reduced package footprint - in some cas, the total package size can be reduced using
竹签可以放烤箱吗flip chip. This can be achieved by either reducing the die to package edge requirements, since
个人简历设计no extra space is required for wires, or in utilizing higher density substrate technology, which allows for reduced
focud on specific benefits that rve a given market. Amkor offers the widest possible range of flip chip packaging solutions to meet the diver needs of customers and end urs. Combining their extensive manufacturing knowledge with all types of packaging interpors and further leveraging their leadership role in flip chip interconnect technology, Amkor continues to pursue new package solutions. This kind of focus is esntial to insure that as new market needs emerge requiring flip chip interconnect, Amkor is ready with the optimum
Current Package Options:
Super FC®Package:
Amkor Technology is now offering Super FC® packaging, the super performance flip chip solution. Flip chip interconnect utilizes array interconnect of die to substrate as a replacement for conventional wire bonding. This allows the entire die surface to be ud for electrical connections to the substrate, exponentially increasing the I/O per unit area vs. perimeter interconnect technologies. Implementing process technology licend from industry leader LSI Logic, Amkor’s Supe rFC package us solder bump flip chip interconnect, and can route over 1000 signal traces from a single die out to a 1.0 mm pitch BGA footprint.
Supe rFC packages are asmbled around state-of-the-art laminate substrates. Utilizing multi-layer, blind and buried vias, lar drilled build-up structures, and ultra fine line/space metallization, Supe rFC has the highest routing density BGA available. Using flip chip interconnect automatically improves package electrical performance by removing the high inductance wires and replacing them with low inductance solder connections. By combining flip chip with ultra advanced substrate technology, packages can be electrically tuned for maximum electrical performance.
Features:
•4-10 layer build up substrates using epoxy laminate
•Target Market - Internet Workstation Processors, High Bandwidth System Communications Devices
•Variety of heatspreader options, passive attach
•175 µm minimum bump pitch
•Die sizes up to 16.7 mm, extending to 21 mm
•Package sizes from 27 mm to 50 mm, passive attach
•JEDEC MS-034 compliant, 1.0 mm pitch BGA footprint
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•Package solutions up to 2400 balls
fc Ceramic CBGA/CLGA/CLLGA/Solder Column Interpor:
莫字开头的成语Flip chip packaging solution for most of flip chip's history.
Features:
•5-20 layers, Alumina and HiTCE
•Target Market - Internet Workstation Processors, High Bandwidth System Communications Devices, Printer Applications
•Lidded and unlidded versions, LGA and BGA, Solder Column Interpor, Passive Attach
继续医学教育杂志•200 µm minimum bump pitch
•Die sizes up to 21 mm
•Package sizes from 27 mm to 50 mm
•1.0 mm and 1.27 mm pitch footprint
fc BGA/LGA (Bare Die):
Flip chip packaging solution for most graphics, PC chipt, and low end ASIC applications.
Features:
•4-8 layer build up substrates using epoxy laminate
•Bare die, Passive Attach
•200 µm minimum bump pitch
•Die sizes up to 16.7 mm
•Package sizes from 27 mm to 37.5 mm合作创业
•JEDEC MS-034 compliant, 1.0 mm pitch BGA footprint
•Stacked vias
旭日东升打一个字•MRT
•Motherboard TCE match (HITCE)
•Low warpage
•Solid ground planes
•Clo substrate to silicon TCE match reduces stress on die surface
•Thermal dissipation (Al2O3)
Minimum package thickness of 0.80 mm for LGA interconnect, 1.0 mm for 0.5 mm BGA pitch and 1.2 mm for 0.8 mm BGA pitch Proven reliability; exceeds all current handt mechanical reliability tests including: drop, bend and key punch
