Enhancing the performances of recycling folded cascode OpAmp
in nanoscale CMOS through voltage supply doubling
and design for reliability
Pui-In Mak 1,*,†,Miao Liu 1,Yaohua Zhao 1and Rui P.Martins 1,2
1
The State-Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,Macao,China
2
Instituto Superior Técnico,TU of Lisbon,Portugal
ABSTRACT
Current-oriented operational ampli fier (OpAmp)design has been common for its orderly current-to-speed tradeoff.However,for high-precision or high-linearity applications,increasing the current does not help much,as the supply voltage (V DD )and intrinsic gain of the MOSFETs in ultra-scaled CMOS techn
ologies are very limited.This paper introduces voltage-oriented circuit techniques to address such limitations.Speci fically,a 2x V DD -enabled recycling folded cascade (RFC)OpAmp is propod.It features:(1)current recycling to enhance the effective trans conductance by 4x with no extra power;(2)transistor stacking to boost the output resistance by one to two orders of magnitude;and (3)V DD elevating to enlarge the linear output swing by 4x.Comparing with its 1x V DD RFC and FC counterparts,the propod solution achieves 20-dB higher DC gain (i.e.72.8dB)in open loop and 20-dB lower ,–76.5dB)in clod loop,under the same power budget of 0.6mW in a 1-V General Purpo 65-nm CMOS process.In many applications,the joint improvements in a single stage are already adequate,being more power ef ficient (i.e.less current paths),stable ( pha margin),and compact ( frequency compensation)than multi-stage OpAmps.Voltage-conscious biasing and node-voltage trajectory check ensure the device reliability in both transient and steady states.No specialized high-voltage device is necessary.Copyright ©2012John Wiley &Sons,Ltd.
Received 14December 2011;Revid 8October 2012;Accepted 12October 2012KEY WORDS:
operational ampli fier;voltage supply;analog circuits;nanoscale CMOS
1.INTRODUCTION
With the rapid reduction of supply voltage (V DD )in nm-length CMOS technologies,high-precision or high-linearity analog circuits (e.g.instrumentation ampli fiers [1]and data converters [2])are getting harder to be realized.Operational ampli fier (OpAmp)is an esntial building block of them [3,4].When speed is the priority,current-oriented OpAmp design is as long as the pha margin is adequate,more current delivers higher gain bandwidth product (GBW)and slew rate (SR).However,increasing the current does not help much on the DC gain and output swing;both are highly relevant to the achievable precision and linearity of an analog circuit.A multi-stage OpAmp [5]has been the practice to alleviate the tradeoff between DC gain and output swing,but penalizing the power,stability and area when comparing with its single-stage counterpart.
Folded cascode (FC)is a single-stage OpAmp widespread for its balanced speed-to-power ef ficiency.Recently,a recycling FC (RFC)technique is propod [6].The currents of the idle devices are effectively re-cycled,improving the effective transconductance with no extra power or adver effect on other performances.Nevertheless,this technique is still short for high-precision or
*Correspondence to:Pui-In Mak,The State-Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,Macao,China.†
E-mail:
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS Int.J.Circ.Theor.Appl.2014;42:605–619
Published online 22November 2012in Wiley Online Library ().DOI:10.1002/cta.1875
high-linearity applications that esntially entail a high DC gain over a wide output swing [7].Enhancing the DC gain via transistor stacking will penalize the output swing when the V DD is limited;constituting a hard tradeoff cannot be simply alleviated by burning more current.
In view of that,the voltage-oriented OpAmp becomes more prospective [8],[9].As shown in Figure 1,a high V DD along with technology downscaling can directly enlarge the voltage headroom with respect to the threshold voltage (V T ),which will not be scaled much due to variability,matching and leakage issues.The key bene fits of V DD -elevated OpAmp are illustrated in Figure 2,where three possible output stages are shown.When considering the output swing and DC gain ,transistor stacking is only effective when a high V DD (e.g.double)is applied,given that the minimum overdrive voltage (V ov,min %0.2V)almost does not scale with the technologies.Although the speed of cascode structures is not as fast as the non-cascode one due to the more non-dominant poles,the parasitic i
mprovement of metallization and fine-linewidth interconnects of advanced CMOS technologies can still be fully bene fitted.The design-for-reliability can be guided by the technology Design Rule Manual.It offers the esntial reliability data related with the absolute maximum rating (AMR),hot carrier injection (HCI),time-dependent dielectric breakdown (TDDB)and negative bias temperature instability (NBTI).Managing the terminal voltages (V GS ,V DS ,V GD )of each device via proper biasing and node-voltage trajectory checks can ensure no device is overstresd at all time.
T h r e s h o l d a n d S u p p l y V o l t a g e s (V )
Technology Node
Figure 1.Increasing the design headroom via elevating the V DD .Design for reliability can ensure no
device
is overstresd at all time.
Figure 2.Possible output stages of an OpAmp with Vov,min %0.2V under the same power budget.The 2-V triple cascode design (right)offers higher DC gain and linear output swing than the 1-V non-cascode (left)
and 1-V double cascode (middle)designs.
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P.-I.MAK ET AL.
In this paper,a voltage-oriented2x V DD-enabled RFC OpAmp is propod.It combines current recycling,transistor stacking and V DD elevating to optimize the performances.The merits are justified by comparing it with its1x V DD RFC counterpart,and its original1x V DD FC counterpart. Note that the true value of2x V DD for the employed1-V General Purpo(GP)65-nm CMOS process is2V,which can be easily generated by a3.6/3.7-V Li-ion battery in typical portable systems.
2PARATIVE STUDY OF1X V DD FC,1X V DD RFC AND2X V DD RFC OpAmps
For the conventional1x V DD FC OpAmp(Figure3),M3-M4operate purely as current sources,not contributing to the transconductance.Differently,the1x V DD RFC OpAmp(Figure4)splits the input differential pair M1–M2into two(M1a,M1b and M2a,M2b)which arefixed to conduct a bias current of I b/2.Accordingly,M3–M4can also be spitted into two,forming the current mirrors M3a:M3b and正能量段子
世界500强中国企业名单
M4a:M4b with a dimension ratio of K:1.The in-pha signal currents are summed at the source nodes of M5and M6.As such,the effective transconductance of1x V DD RFC OpAmp is boosted by 1
+K times with no extra power when comparing with its1x V DD FC counterpart.Finally,the addition of M11–M12helps matching the drain voltages of M3a:M3b and M4a:M4b.The main overhead of the RFC technique is certain degradation of pha margin,which will be of more concern if the OpAmp is extended to a multi-stage design.
V
大班班级工作计划1xV DD
金牛男天秤女Figure3.The conventional1x V DD FC OpAmp.
V
b
/2 Figure4.The1x V DD RFC OpAmp.
OpAmp WITH VOLTAGE SUPPLY DOUBLING AND DESIGN FOR RELIABILITY607
Under the same power budget,doubling the supply is highly different from doubling the current.The propod 2x V DD RFC OpAmp adds only cascode devices as depicted in Figure 5.M 0’is added to boost the output resistance of the current source M 0and thereby improves the OpAmp ’s common-mode rejection ratio.Similarly,(M 3a ,M 3b ,M 4a ,M 4b )are cascoded with (M 3a ’,M 3b ’,M 4a ’,M 4b ’),and (M 7,M 8)are cascoded with (M 7’,M 8’).Thus,the OpAmp ’s DC gain is signi ficantly enhanced
due to the bigger output resistance of each gain node.Unlike the 1x V DD FC and RFC OpAmps,the linear output swing of 2x V DD RFC OpAmp is enlarged,too.The incread voltage stress is shared among the added cascoded devices.
In the following sub-ctions,V DD =1V is t for the employed GP 65-nm CMOS process.The key performances of 1-V FC,1-V RFC and 2-V RFC OpAmps are compared under the same power budget.For the 1-V and 2-V RFC OpAmps,K =3is t to ensure the input and output currents are matched for optimum speed.All devices are assumed to be operated in the saturation region with the square-law equation given by,
I D ¼12m C ox W
L
V GS ÀV T ðÞ2
(1)
where m C ox is the technology constant,W/L is the device aspect ratio,V GS is the gate-source voltage
and V T is the threshold voltage.2.1.Transconductance and GBW
The effective transconductance (G m )of each OpAmp topology is examined first.By finding the short-circuit current at the output with respect to the input we obtain,
G m ;2-V RFC ¼g m 1a 1þK ðÞ(2)G m ;1-V RFC ¼g m 1a 1þK ðÞ
(3)G m ;1-V FC ¼g m 1
(4)
where g m1(g m1a )is the transconductance of M 1(M 1a ).Although the 2-V and 1-V RFC OpAmps show the same G m expression,G m,2V-RFC is just 50%of G m,1V-RFC for its halved bias current.M 1in FC is twice the size of M 1a and draws twice amount of current.Recalling that K =3,G m of 1-V RFC
b /4
V Figure 5.The propod 2x V DD RFC OpAmp.
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OpAmp is twice that of 2-V RFC and 1-V FC OpAmps under the same power.Thus,when speed is th
e priority,the 1-V RFC OpAmp should be chon,as it should show the highest GBW among them.2.2.DC gain
The DC gain can be expresd as the product of G m and the output impedance R O .It has been shown above that G m,1V-RF C =2G m,2V-RF C =2G m,1V-FC .The 1-V RFC OpAmp,therefore,shows 6-dB higher DC gain compared to the other two under the same output resistance.However,the output resistance of 2-V RFC OpAmp should be bigger by one to two orders of magnitude,due to the smaller bias current and more stacked transistors.The corresponding output impedances of them are given by,
R O ;2-V RFC %g m 5þg mb 5ðÞr o 5r o 1a jj g m 3a ’þg mb 3a ’ðÞr o 3a ’r o 3a ðÞ½ f gjj g m 7r o 7g m 7’r o 7’r o 9ðÞ
煮马铃薯
(5)R O ;1-V RFC %g m 5þg mb 5ðÞr o 5r o 1a jj r o 3a ðÞ½ jj g m 7r o 7r o 9ðÞ(6)R O ;1-V FC %g m 5þg mb 5ðÞr o 5r o 1jj r o 3ðÞ½ jj g m 7r o 7r o 9ðÞ
(7)
where r o reprents the output resistance of the corresponding transistors.M 1a (M 3a )in the 1-V R
FC OpAmp conduct less current than M 1(M 3)in the 1-V FC one,showing larger output resistance.As a result,R O,2-V RFC >>R O,1-V RFC >R O,1-V FC is expected.2.3.Output swing
The output swing is greatly associated with the V DD .Apparently,the 2-V RFC OpAmp has a larger signal swing under the same V ov for all devices as given by,
V O S wing ;2-V RFC ¼2Â2ÀV ov 3a ’þV ov 3a þV ov 5þV ov 7j jþðj V ov 7’½j þj V ov 9jÞ
(8)V O S wing ;1-V RFC ¼2Â1ÀV ov 3a þV ov 5þV ov 7j jþðj V ov 9½jÞ (9)V O S wing ;1ÀV FC ¼2Â1ÀV ov 3þV ov 5þV ov 7j jþðj V ov 9½jÞ
(10)
For a typical V ov %0.2V,the differential swings are 0.4V pp (1-V FC),0.4V pp (1-V RFC)and 1.6V pp (2-V RFC).Thus,the 2-V RFC OpAmp should be more superior for high-precision or high-linearity analog circuits.2.4.SR
SR determines the large-signal respon time and linearity of an analog circuit.When driving a capacitive load C L ,the SR of the 2-V RFC OpAmp can be analyzed as follows:when V inp goes high,M 1a and M 1b will be turned off,forcing M 4a :M 4b and M 4a ’:M 4b ’to shut down as well.Cons
equently,M 6will be turned off whereas M 2a is driven into the deep triode region.All the tail current I b goes through M 2b and is mirrored by a factor of K (M 3b :M 3a )into M 5.At the same time,the output current goes through M 7,and the two currents subtract at the V On node.Thus,C L is discharged by 2.5I b .For another half of the circuit,when V inn goes down,M 6is directly shut down so there is no current going through M 6.Thus,C L is charged by 0.5I b through M 8.
The above analysis is only correct when the circuit does not contain a common-mode feedback (CMFB).However,for a fully differential OpAmp,the CMFB is esntial.With the u of CMFB,a symmetrical SR can be obtained.The charge and discharge currents will be averaged to be 1.5I b .Similar analysis can be applied to 1-V FC and RFC OpAmps.The final averaged charge and discharge current for 1-V FC and RFC OpAmps are I b and 3I b ,respectively.In this way,the SR for the three OpAmps can be obtained,
OpAmp WITH VOLTAGE SUPPLY DOUBLING AND DESIGN FOR RELIABILITY
609
吃苹果能减肥吗S R2-V RFC¼KI b
2C L
(11)
S R1-V RFC¼KI b
C L
(12)
S R1-V FC¼I b
L
(13)
From Eqs.(11)–(13),we can show that SR1-V RFC=2SR2-V RFC=3SR1-V FC.Note that the are the theoretical values.The accuracy of the current mirror can be degraded by large transients in practice. Indeed,the SR can be restricted by the sizing and bias conditions of M5and M6.
2.5.Pha margin
All OpAmps feature the same dominant pole o p1associated with the loading capacitor C L and a no
n-dominant pole o p2at the source of M5which is approximately located at g m5/C gs5.In addition, the1-V and2-V RFC OpAmps have a mirror pole-zero pair:o p3=g m3b/(1+K)C gs3b and o z1=(1+K)o p3,in the current mirrors M3b:M3a and M4b:M4a.The2-V RFC OpAmp exhibits another high-frequency pole o p4at the source of M3a’,locating at g m3a’/C gs3a’.
Although the2-V RFC OpAmp has more non-dominant poles,its device sizes can be halved in comparing with the1-V FC and RFC OpAmps,inducing less parasitic capacitance.For a reasonably large C L,all the three OpAmps are safe in terms of stability.The pole-zero locations of the 2-V RFC OpAmp are depicted in Figure6.It is assumed that all non-dominant poles are beyond the unity gain frequency o u for a good pha margin.Also,the locations of o p2and o p3may be interchanged depending on the design.
The value of K plays an important role in determining the pha margin of the1-V and2-V RFC OpAmps.For high-speed applications,K can be chon such that o p3>3o u as given by,
v p3>3v u,g m3b
1þK
ðÞC gs3b >31þK
ðÞg m1a
C L
⇒K<
ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
g m3b C L
3g m1a
C gs3b
gs3b
m1a
s
À1(14)
法老王之心
which places an upper limit on K.For low-speed applications,the pha margin will not be restricted by K.A reasonable range for K value that can minimize the pha margin degradation is2to4.
2.6.Noi
The OpAmp’s noi can be a limiting factor of analog circuit’s nsitivity.The output-referred squared noi current of a MOSFET is given by,
i2 o ¼4k B T g g mþK F I D
C ox L2f
!
ÁΔf(15)
where thefirst and cond terms reprent the thermal andflicker noi,respectively.k b is the Boltzmann constant,T is the temperature(Kelvin),g is the bias-dependent parameter,K F is a process-dependent constant,I D is the drain current,C ox is the gate oxide capacitance per unit area,
鸽子怎么做s-plane
Figure6.Pole-zero locations of the2x V DD RFC OpAmp in the s-domain.
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