SP3481中文资料

更新时间:2023-06-06 17:26:43 阅读: 评论:0

qq情侣昵称
■RS-485 and RS-422 Transceivers ■Operates from a single +3.3V supply ■Interoperable with +5.0V logic ■Driver/Receiver Enable
■Low Power Shutdown Mode (SP3481)■
-7V to +12V Common-Mode Input Voltage Range
■Allows up to 32 transceivers on the rial bus
■Compatibility with the industry standard 75176 pinout
■Driver Output Short-Circuit Protection
DESCRIPTION
The SP3481 and the SP3485 are a family of +3.3V low power half-duplex transceivers that meet the specifications of the RS-485 and RS-422 rial protocols. The devices are pin-to-pin compatible with the Sipex SP481, SP483, and SP485 devices as well as popular industry standards. The SP348
1 and the SP3485 feature Sipex's BiCMOS process, allowing low power operation without sacrificing performance. The SP3481 and SP3485 meet the electrical specifications of RS-485 and RS-422 rial protocols up to 10Mbps under load. The SP3481is equipped with a low power Shutdown mode.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
The are stress ratings only and functional operation of the device at the ratings or any other above tho indicated in the operation ctions of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.V CC .............................................................................................+6.0V Input Voltages
Logic .....................................................-0.3V to +6..-0.3V to +6.0V Receivers (15)
Output Voltages
<±15V Receivers ..............................................-0.3V to +6.0V
-65˚C to +150˚C Power Dissipation per Package
8-pin NSOIC (derate 6.90mW/o C above +70o C).....................600mW 8-pin PDIP (derate 11.8mW/o C above +70o C)......................1000mW
元器件交易网
新生儿一直打嗝
元器件交易网
SPECIFICATIONS (continued)
PIN FUNCTION
Pin 1 – RO – Receiver Output.
Pin 2 – RE – Receiver Output Enable Active LOW.Pin 3 – DE – Driver Output Enable Active HIGH.Pin 4 – DI – Driver Input.Pin 5 – GND – Ground Connection.Pin 6 – A – Driver Output/Receiver Input Non-inverting.
Pin 7 – B – Driver Output/Receiver Input Inverting.Pin 8 – V CC
DESCRIPTION
文艺青年
The SP3481 and the SP3485 are 2 members in the family of +3.3V low power half-duplex transceivers that meet the specifications of the RS-485 and RS-422 rial protocols. The devices are pin-to-pin compatible with the Sipex SP481, SP483, and SP485 devices as well as popular industry standards. The SP3481 and the SP3485 feature Sipex's BiCMOS process allowing low power operation without sacrificing performance.Drivers
The driver outputs of the SP3481 and SP3485are differential outputs meeting the RS-485 and RS-422 standards.  The typical voltage output swing with no load will be 0 Volts to +3.3 Volts.With a load of 54Ω across the differential outputs, the drivers maintain greater than 1.5V voltage levels. The drivers of the SP3481and SP3485 have an enable control line which is active HIGH.  A logic HIGH on DE (pin 3)will enable the differential driver outputs.A logic LOW on DE (pin 3) will tri-state the driver outputs.
The tranceivers in the SP3481 and SP3485operate up to 10Mbps. The 250mA I SC maximum limit on the driver output allows the SP3481 and the SP3485 to withstand an infinite short circuit over the -7.0V to +12.0V common mode range without catastrophic damage to the IC.
SP3481/SP3485Pinout (Top View)
衢州三头Receivers
The SP3481 and SP3485 receivers have differential inputs with an input nsitivity as low as ±200mV. Input impedance of the receivers is typically 15k Ω (12k Ω minimum).A wide common mode range of -7V to +12V allows for large ground potential differences between systems. The receivers of the SP3481and SP3485 have a tri-state enable control pin.A logic LOW on RE (pin 2) will enable the receiver, a logic HIGH on RE (pin 2) will disable the receiver.
The receivers of the SP3481 and SP3485 operate up to 10Mbps. The receiver for each of the  three devices is equipped with fail-safe. Fail-safe guarantees that the receiver output will be in a HIGH state when the input is left unconnected.Shutdown Mode for the SP3481The SP3481 is equipped with a Shutdown mode.To enable the Shutdown state, both the driver and receiver must be disabled simultaneously.A logic LOW on DE (pin 3) and a logic HIGH on SP3481 into Shutdown mode.  In Shutdown, supply current will drop to typical 1µA, 10µA maximum.
财经类专业有哪些
INPUTS OUTPUTS LINE RE DE DI CONDITION B A X 11No Fault 01X 10No Fault 10X
X
X
Z
Z动词大全
INPUTS OUTPUTS
RE DE    A - B R 00 +0.2V 100 -0.2V 000Inputs Open 1
10X Z
Table 1. Transmit Function Truth Table
Table 2. Receive Function Truth Table
Figure 2. Driver Propagation Delay Test Circuit
Figure 4. Driver Enable and Disable Timing Circuit,Output HIGH
Figure 1. Driver DC Test Load Circuit
折旧年限的最新规定
Figure 7. Receiver Enable and Disable Timing Circuit
月亮的恋人
Figure 5. Driver Enable and Disable Timing Circuit,Output LOW
Figure 3. Driver Differential Output Delay and Transition Time Circuit

本文发布于:2023-06-06 17:26:43,感谢您对本站的认可!

本文链接:https://www.wtabcd.cn/fanwen/fan/82/886481.html

版权声明:本站内容均来自互联网,仅供演示用,请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系,我们将在24小时内删除。

标签:规定   昵称   元器件   新生儿
相关文章
留言与评论(共有 0 条评论)
   
验证码:
推荐文章
排行榜
Copyright ©2019-2022 Comsenz Inc.Powered by © 专利检索| 网站地图