UC2526A UC3526A
Regulating Pul Width Modulator
FEATURES
•Reduced Supply Current •Oscillator Frequency to 600kHz •Precision Band-Gap Reference •7 to 35V Operation
•Dual 200mA Source/Sink Outputs •Minimum Output Cross-Conduction •Double-Pul Suppression Logic •Under-Voltage Lockout •Programmable Soft-Start •Thermal Shutdown
•TTL/CMOS Compatible Logic Ports •
5 Volt Operation (V IN = V C = V REF = 5.0V)
DESCRIPTION
The UC1526A Series are improved-performance pul-width modu-lator circuits intended for direct repl
acement of equivalent non- “A”versions in all applications. Higher frequency operation has been enhanced by veral significant improvements including: a more ac-curate oscillator with less minimum dead time, reduced circuit de-lays (particularly in current limiting), and an improved output stage with negligible cross-conduction current. Additional improvements include the incorporation of a precision, band-gap reference gener-ator, reduced overall supply current, and the addition of thermal shutdown protection.
Along with the improvements, the UC1526A Series retains the protective features of under-voltage lockout, soft-start, digital cur-rent limiting, double pul suppression logic, and adjustable deadtime. For ea of interfacing, all digital control ports are TTL compatible with active low logic.
Five volt (5V) operation is possible for “logic level” applications by connecting V IN, V C and V REF to a precision 5V input supply. Consult factory for additional information.
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生态污染RECOMMENDED OPERATING CONDITIONS
平凡中的不平凡(Note 3)
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V to +35V Collector Supply Voltage . . . . . . . . . . . . . . . . . . +4.5V to +35V Sink/Source Load Current (each output). . . . . . . . 0 to 100mA Reference Load Current. . . . . . . . . . . . . . . . . . . . . . 0 to 20mA Oscillator Frequency Range. . . . . . . . . . . . . . . . 1Hz to 600kHz Oscillator Timing Resistor. . . . . . . . . . . . . . . . . . . 2k Ω to 150k ΩOscillator Timing Capacitor. . . . . . . . . . . . . . . . . 400pF to 20µF Available Deadtime Range at 40kHz . . . . . . . . . . . . 1% to 50%Operating Ambient Temperature Range
UC1526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C UC2526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25°C to +85°C UC3526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C ABSOLUTE MAXIMUM RATINGS (Note 1, 2)
Input Voltage (+V IN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V Collector Supply Voltage (+V C ). . . . . . . . . . . . . . . . . . . . . +40V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +5.5V Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +V IN Source/Sink Load Current (each output). . . . . . . . . . . . 200mA Reference Load Current. . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Logic Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA Power Dissipation at T A = +25°C (Note 2) . . . . .
. . . . 1000mW Power Dissipation at T C = +25°C (Note 2). . . . . . . . . . 3000mW Operating Junction Temperature . . . . . . . . . . . . . . . . . . +150°C Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (soldering, 10 conds). . . . . . . . . . +300°C
Note 1:Values beyond which damage may occur.
Note 2: Consult packaging Section of Databook for thermal
limitations and considerations of package.
Note 3:Range over which the device is functional and
parameter limits are guaranteed.
+V IN = 15V, and over operating ambient temperature, unless otherwi specified T A = T J.
宝宝出汗Note 4:I L = 0mA.
Note 5:Guaranteed by design, not 100% tested in production. Note 6:F OSC = 40kHz, (R T = 4.12kΩ± 1%, C T = 0.01µF± 1%, R D = 0 Ω).Note 7:V CM = 0 to +5.2V
Note 8:V CM = 0 to +12V.
Note 9:V C = +15V.
Note 10:V IN = +35V, R T = 4.12kΩ.
ELECTRICAL CHARACTERISTICS:
+V IN = 15V, and over operating ambient temperature, unless otherwi specified T A = T
J. Array Note 4:I L = 0mA.
Note 5:Guaranteed by design, not 100% tested in production.
环保标语
Note 6:F OSC = 40kHz, (R T = 4.12kΩ± 1%, C T = 0.01µF± 1%,
R D = 0 Ω).
Note 7:V CM = 0 to +5.2V
Note 8:V CM = 0 to +12V.
Note 9:V C = +15V.
Note 10:V IN = +35V, R T = 4.12kΩ.
Open Loop Test Circuit UC1526A
APPLICATIONS INFORMATION
Voltage Reference
The reference regulator of the UC1526A is bad on a precision band-gap reference, internally trimmed to ±1% accuracy. The circuitry is fully active at supply voltages above +7V, and provides up to 20mA of load current to external circuitry at +5.0V. In systems where additional current is required, an external PNP transistor can be ud to boost the available current. A rugged low fre-quency audio-type transistor should be ud, and lead
lengths between the PWM and transistor should be as short as possible to minimize the risk of oscillations. Even so, some types of transistors may require collec-tor-ba capacitance for stability. Up to 1 amp of load current can be obtained with excellent regulation if the device lected maintains high current gain.Soft-Start Circuit
技校学专业The soft-start circuit protects the power transistors and rectifier diodes from high current surges during power supply turn-on. When supply voltage is first applied to the UC1526A, the under-voltage lockout circuit holds RESET LOW with Q3. Q1 is turned on, which holds the soft-start capacitor voltage at zero. The cond collector of Q1 clamps the output of the error amplifier to ground, guara
nteeing zero duty cycle at the driver outputs. When the supply voltage reaches normal operating range, RESET will go HIGH. Q1 turns off, allowing the internal 100µA current source to charge C S. Q2 clamps the error amplifier output to 1V BE above the voltage on C S. As the soft-start voltage ramps up to +5V, the duty cycle of the PWM linearly increas to whatever value the voltage regulation loop requires for an error null.
Under-Voltage Lockout
晒太阳过敏The under-voltage lockout circuit protects the UC1526A and the power devices it controls from inadequate sup-ply voltage, If +V IN is too low, the circuit disables the output drivers and holds the RESET pin LOW. This pre-vents spurious output puls while the control circuitry is stabilizing, and holds the soft-start timing capacitor in a discharged state.
The circuit consists of a +1.2V bandgap reference and comparator circuit which is active when the reference voltage has rin to 3V BE or +1.8V at 25°C. When the reference voltage ris to approximately +4.4V, the cir-cuit enables the output drivers and releas the RESET pin, allowing a normal soft-start. The comparator has 350mV of hysteresis to minimize oscillation at the trip point. When +V IN to the PWM is removed and the refer-ence drops to +4.2V, the under-voltage circuit pull
s RE-SET LOW again. The soft-start capacitor is immediately discharged, and the PWM is ready for another soft-start cycle.
The UC1526A can operate from a +5V supply by con-necting the V REF pin to the +V IN pin and maintaining the
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我和我的父亲supply between +4.8 and +5.2V.Digital Control Ports
The three digital control ports of the UC1526A are bi-di-rectional. Each pin can drive TTL and 5V CMOS logic di-rectly, up to a fan-out of 10 low-power Schottky gates. Each pin can also be directly driven by open-collector TTL, open-drain CMOS, and open-collector voltage comparators; fan-in is equivalent to 1 low-power Schot-tky gate. Each port is normally HIGH; the pin is pulled LOW to activate the particular function. Driving SYNC LOW initiates a discharge cycle in the oscillator. Pulling SHUTDOWN LOW immediately inhibits all PWM output
puls. Holding RESET LOW discharges the soft-start Figure 3.Soft-Start Circuit Schematic
