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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its u, nor for any infringements of patents or other rights of third parties which may result from its u. No licen is granted by implication or otherwi under any patent or patent rights of Analog Devices.
a
AD633
春季女装One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700World Wide Web Site: Fax: 781/326-8703© Analog Devices, Inc., 1999
Low Cost Analog Multiplier
CONNECTION DIAGRAMS 8-Lead Plastic DIP (N) Package
X1
X2
Y1Y2+V S –V S
8-Lead Plastic SOIC (SO-8) Package
X1
X2
Y1Y2W
Z +V S
–V S W =
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抽查检验(X 1 – X 2) (Y 1 – Y 2)
+ Z
10V
FEATURES
Four-Quadrant Multiplication Low Cost 8-Lead Package
Complete—No External Components Required Lar-Trimmed Accuracy and Stability Total Error Within 2% of FS
Differential High Impedance X and Y Inputs High Impedance Unity-Gain Summing Input Lar-Trimmed 10 V Scaling Reference
APPLICATIONS
Multiplication, Division, Squaring
Modulation/Demodulation, Pha Detection
Voltage-Controlled Amplifiers/Attenuators/Filters
PRODUCT DESCRIPTION
The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs and a high impedance summing input (Z). The low im-pedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the first product to offer the features in modestly priced 8-lead plastic DIP and SOIC packages.The AD633 is lar calibrated to a guaranteed total accuracy of 2% of full scale. Nonlinearity for the Y-input is typically less than 0.1% and noi referred to the output is typically less than 100 µV rms in a 10 Hz to 10 kHz bandwidth. A 1 MHz band-width, 20 V/µs slew rate, and the ability to drive capacitive loads make the AD633 uful in a wide variety of applications where simplicity and cost are key concerns.
The AD633’s versatility is not compromid by its simplicity.The Z-input provides access to the output buffer amplifier,
enabling the ur to sum the outputs of two or more multipliers,increa the multiplier gain, convert the output voltage to a current, and configure a variety of applications.
The AD633 is available in an 8-lead plastic DIP package (N)and 8-lead SOIC (R). It is specified to operate over the 0°C to +70°C commercial temperature range (J Grade) or the –40°C to +85°C industrial temperature range (A Grade).
PRODUCT HIGHLIGHTS
1.The AD633 is a complete four-quadrant multiplier offered in low cost 8-lead plastic packages. The result is a product that is cost effective and easy to apply.
2.No external components or expensive ur calibration are required to apply the AD63
3.3.Monolithic construction and lar calibration make the de-vice stable and reliable.
4.High (10 M Ω) input resistances make signal source loading negligible.
5.Power supply voltages can range from ±8 V to ±18 V. The internal scaling voltage is generated by a stable Zener diode;multiplier accuracy is esntially supply innsitive.
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美食情缘
–2–AD633–SPECIFICATIONS
(T A = +25؇C, V S = ؎15 V, R L ≥ 2 k ⍀)
Model
AD633J, AD633A
W X
X Y Y V
Z
=−()−(
)+1
212
10TRANSFER FUNCTION Parameter
Conditions
Min Typ Max Unit MULTIPLIER PERFORMANCE Total Error –10 V ≤ X, Y ≤ +10 V ±1؎2
% Full Scale T MIN to T MAX ±3
% Full Scale Scale Voltage Error SF = 10.00 V Nominal ±0.25%% Full Scale Supply Rejection V S = ±14 V to ±16 V ±0.01% Full Scale Nonlinearity, X X = ±10 V, Y = +10 V ±0.4؎1% Full Scale Nonlinearity, Y Y = ±10 V, X = +10 V ±0.1؎0.4% Full Scale X Feedthrough Y Nulled, X = ±10 V ±0.3؎1% Full Scale Y Feedthrough
X Nulled, Y = ±10 V
±0.1؎0.4% Full Scale Output Offt Voltage ±5؎50
mV DYNAMICS
Small Signal BW V O = 0.1 V rms 1MHz Slew Rate
V O = 20 V p-p 20V/µs Settling Time to 1%∆ V O = 20 V
2µs OUTPUT NOISE Spectral Density 0.8µV/√Hz Wideband Noi f = 10 Hz to 5 MHz 1mV rms f = 10 Hz to 10 kHz
90
µV rms OUTPUT
Output Voltage Swing ؎11
V Short Circuit Current R L = 0 Ω3040
mA INPUT AMPLIFIERS Signal Voltage Range Differential ؎10V Common Mode ؎10V Offt Voltage X, Y ±5؎30mV CMRR X, Y
V CM = ±10 V, f = 50 Hz
60
80dB Bias Current X, Y, Z 0.8 2.0
µA Differential Resistance 10
M Ω
POWER SUPPLY Supply Voltage
Rated Performance ±15
V Operating Range ؎8
؎18V Supply Current
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Quiescent
4
6mA
NOTES
Specifications shown in boldface are tested on all production units at electrical test. Results from tho tests are ud to calculate outgoing quality levels. All min and max specifications are guaranteed, although only tho shown in boldface are tested on all production units.Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS 1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V I
nternal Power Dissipation 2 . . . . . . . . . . . . . . . . . . . .500 mW Input Voltages 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V Output Short Circuit Duration . . . . . . . . . . . . . . . . .Indefinite Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C Operating Temperature Range
AD633J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C AD633A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 60 c) . . . . . . . .+300°C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 V
NOTES 1
Stress above tho listed under Absolute Maximum Ratings may cau perma-nent damage to the device. This is a stress rating only; functional operation of the device at the or any other conditions above tho indicated in the operational ction of this specification is not implied.2
8-Lead Plastic DIP Package: θJA = 90°C/W; 8-Lead Small Outline Package: θJA =155°C/W.3
For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage.
ORDERING GUIDE
Temperature Package Package Model
Range Description Option AD633AN –40°C to +85°C Plastic DIP N-8AD633AR
–40°C to +85°C Plastic SOIC
SO-8AD633AR-REEL –40°C to +85°C 13" Tape and Reel SO-8AD633AR-REEL7–40°C to +85°C 7" Tape and Reel SO-8AD633JN 0°C to +70°C Plastic DIP N-8AD633JR
0°C to +70°C Plastic SOIC
SO-8AD633JR-REEL 0°C to +70°C 13" Tape and Reel SO-8AD633JR-REEL7
0°C to +70°C
7" Tape and Reel
SO-8
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AD633
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FUNCTIONAL DESCRIPTION
The AD633 is a low cost multiplier comprising a translinear core, a buried Zener reference, and a unity gain connected output amplifier with an accessible summing node. Figure 1shows the functional block diagram. The differential X and Y inputs are converted to differential currents by voltage-to-current converters. The product of the currents is generated by the multiplying core. A buried Zener reference provides an overall scale factor of 10 V. The sum of (X × Y)/10 + Z is then applied to the output amplifier. The amplifier summing node Z allows the ur to add two or more multiplier outputs, convert the output voltage to a current, and configure various analog com-putational functions.
W
Z
S –V S
Figure 1.Functional Block Diagram (AD633JN Pinout Shown)
Inspection of the block diagram shows the overall transfer func-tion to be:
W X
X Y Y V
Z
=−()−(
)+1
212
10 (Equation 1)
ERROR SOURCES
Multiplier errors consist primarily of input and output offts,scale factor error, and nonlinearity in the multiplying core. The input and output offts can be eliminated by using the optional trim of Figure 2. This scheme reduces the net error to scale factor errors (gain error) and an irreducible nonlinearity compo-nent in the multiplying core. The X and Y nonlinearities are typically 0.4% and 0.1% of full scale, respectively. Scale factor error is typically 0.25% of full scale. The high impedance Z input should always be referenced to the ground point of the driven system, particularly if this is remote. Likewi, the differ-ential X and Y inputs should be referenced to their respective grounds to realize the full accuracy of the AD633.
50k –V S
؎50mV
TO APPROPRIATE INPUT TERMINAL (E.G. X 2, X 2, Z)
Figure 2.Optional Offt Trim Configuration
APPLICATIONS
The AD633 is well suited for such applications as modulation and demodulation, automatic gain control, power measurement,
voltage controlled amplifiers, and frequency doublers. Note that the applications show the pin connections for the AD633JN pinout (8-lead DIP), which differs from the AD633JR pinout (8-lead SOIC).
Multiplier Connections
Figure 3 shows the basic connections for multiplication. The X and Y inputs will normally have their negative nodes grounded,but they are fully differential, and in many applications the grounded inputs may be reverd (to facilitate interfacing with signals of a particular polarity, while achieving some desired output polarity) or both may be driven.
(X 1 – X 2) (Y 1 – Y 2)
+ Z
10V
Figure 3.Basic Multiplier Connections
Squaring and Frequency Doubling
As Figure 4 shows, squaring of an input signal, E, is achieved simply by connecting the X and Y inputs in parallel to produce an output of E 2/10 V. The input may have either polarity, but the output will be positive. However, the output polarity may be reverd by interchanging the X or Y inputs. The Z input may be ud to add a further signal to the output.
E 210V
Figure 4.Connections for Squaring
When the input is a sine wave E sin ωt, this squarer behaves as a frequency doubler, since
E t V
E V
t sin cos ωω()
=
−()
2
2
102012(Equation 2)
Equation 2 shows a dc term at the output which will vary strongly with the amplitude of the input, E.
This can be avoided using the connections shown in Figure 5, where an RC network is ud to generate two signals who product has no dc term. It us the identity:
cos sin sin θθθ=
()
1
2
2(Equation 3)
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黄山一日游AD633
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W =E 210V
Figure 5.”Bounceless” Frequency Doubler
At ωo = 1/CR, the X input leads the input signal by 45° (and is attenuated by √2), and the Y input lags the X input by 45° (and is also attenuated by √2). Since the X and Y inputs are 90° out of pha, the respon of the circuit will be (satisfying Equation 3):
W V E
t E
t E V t o
o
o
=
()
+°()−°()=()
()
1
102
452
454022
sin sin sin ωωω(Equation 4)
which has no dc component. Resistors R1 and R2 are included to
restore the output amplitude to 10 V for an input amplitude of 10 V.The amplitude of the output is only a weak function of fre-quency: the output amplitude will be 0.5% too low at ω =0.9 ωo , and ωo = 1.1 ωo .
Generating Inver Functions
Inver functions of multiplication, such as division and square rooting, can be implemented by placing a multiplier in the feed-back loop of an op amp. Figure 6 shows how to implement a square rooter with the transfer function
W V E
=−()
10(Equation 5)
for the condition E<0.
E
R Figure 6.Connections for Square Rooting
E E X
R
Figure 7.Connections for Division
Likewi, Figure 7 shows how to implement a divider using a
multiplier in a feedback loop. The transfer function for the divider is
W V
E
E X =−()
10(Equation 6)
(X 1 – X 2) (Y 1 – Y 2)
10V
1k
R1, R2 ⍀
Figure 8.Connections for Variable Scale Factor Variable Scale Factor
In some instances, it may be desirable to u a scaling voltage other than 10 V. The connections shown in Figure 8 increa the gain of the system by the ratio (R1 + R2)/R1. This ratio is limited to 100 in practical applications. The summing input, S,may be ud to add an additional signal to the output or it may be grounded.
Current Output
The AD633’s voltage output can be converted to a current output by the addition of a resistor R between the AD633’s W and Z pins as shown in Figure 9 below. This arrangement forms
(X 1 – X 2) (Y 1 – Y 2)
10V 1R
=
1k ⍀
Figure 9.Current Output Connections
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AD633
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the basis of voltage controlled integrators and oscillators as will be shown later in this Applications ction. The transfer func-tion of this circuit has the form
I R X X Y Y V
O =
−()−()
1101212
(Equation 7)
Linear Amplitude Modulator
The AD633 can be ud as a linear amplitude modulator with no external components. Figure 10 shows the circuit. The car-rier and modulation inputs to the AD633 are multiplied to produce a double-sideband signal. The carrier signal is fed forward to the AD633’s Z input where it is summed with the double-sideband signal to produce a double-sideband with carrier output.
Voltage Controlled Low-Pass and High-Pass Filters
Figure 11 shows a single multiplier ud to build a voltage con-trolled low-pass filter. The voltage at output A is a result of filtering, E S . The break frequency is modulated by E C , the con-trol input. The break frequency, f 2, equals
f E V RC
C
220=()π(Equation 8)
and the rolloff is 6 dB per octave. This output, which is at a high impedance point, may need to be buffered.
The voltage at output B, the direct output of the AD633, has same respon up to frequency f 1, the natural breakpoint of RC filter,
f RC 11
2=
π(Equation 9)
then levels off to a constant attenuation of f 1/f 2 = E C /10.
؎E E C sin E C sin t
Figure 10.Linear Amplitude Modulator
For example, if R = 8 k Ω
and C = 0.002 µF, then output A has a pole at frequencies from 100 Hz to 10 kHz for E C ranging from 100 mV to 10 V. Output B has an additional zero at 10 kHz (and can be loaded becau it is the multiplier’s low impedance output). The circuit can be changed to a high-pass filter Z inter-changing the resistor and capacitor as shown in Figure 12 below.
INPUT E
Figure 11.Voltage Controlled Low-Pass Filter
INPUT E f
新津公众信息网Figure 12.Voltage Controlled High-Pass Filter Voltage Controlled Quadrature Oscillator
Figure 13 shows two multipliers being ud to form integrators with controllable time constants in a 2nd order differential equation feedback loop. R2 and R5 provide controlled current output operation. The currents are integrated in capacitors C1and C2, and the resulting voltages at high impedance are applied to the X inputs of the “next” AD633. The frequency control input, E C , connected to the Y inputs, varies the integrator gains with a calibration of 100 Hz/V. The accuracy is limited by the Y-input offts. The practical tuning range of this circuit is 100:1. C2 (proportional to C1 and C3), R3, a
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nd R4 provide regenerative feedback to start and maintain oscillation. The diode bridge, D1 through D4 (1N914s), and Zener diode D5provide economical temperature stabilization and amplitude stabilization at ±8.5 V by degenerative damping. The out-put from the cond integrator (10 V sin ωt) has the lowest distortion.
AGC AMPLIFIERS
Figure 14 shows an AGC circuit that us an rms-dc converter to measure the amplitude of the output waveform. The AD633and A1, 1/2 of an AD712 dual op amp, form a voltage con-trolled amplifier. The rms dc converter, an AD736, measures the rms value of the output signal. Its output drives A2, an integrator/comparator, who output controls the gain of the voltage controlled amplifier. The 1N4148 diode prevents the output of A2 from going negative. R8, a 50 k Ω variable resistor,ts the circuit’s output level. Feedback around the loop forces the voltages at the inverting and noninverting inputs of A2 to be equal, thus the AGC.
