[MULTI-GATE DRAM WITH DEEP-TRENCH CAPACITOR AND FA

更新时间:2023-05-16 00:23:11 阅读: 评论:0

专利名称:[MULTI-GATE DRAM WITH DEEP-TRENCH
什么是阴阳CAPACITOR AND FABRICATION THEREOF]
发明人:Ming Tang韶华不再
申请号:US10709719
申请日:20040525
再三的意思是什么公开号:US20050275006A1
大熊猫的祖先是谁公开日:
20051215
cad注册表>流血的图片专利内容由知识产权出版社提供
专利附图:
摘要:A multi-gate DRAM cell is described, including a multi-gate transistor and a祭十二郎文
deep trench capacitor. The transistor includes a miconductor pillar, a multi-gate, a gate dielectric layer, a first and a cond source/drain regions. The pillar is beside the deep
trench capacitor not overlapping with the latter. The multi-gate is at least on three sidewalls of the pillar parated by the gate dielectric layer, and can be a treble gate or a surrounding gate. The first source/drain region is in the top portion of the pillar, and the cond source/drain region in the pillar coupling with the deep trench capacitor.
申请人:Ming Tang
地址:Hualien County 970 TW
猫作文
国籍:TW
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