专利名称：PRIORITY DECISION SYSTEM 发明人：NISHIBE SHINJI
申请号：JP12871178雪莲果的营养价值
申请日：19781019
公开号：JPS5556258A
公开日：
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梦见大西瓜19800424
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王一萌风江摘要：PURPOSE:To lighten a load upon hardware by making a decision on priority given to various interruption requests of an information processor, by effectively using firmware. CONSTITUTION:Control memory part P-ROM101 stored with various microprograms is stored with branch microinstruction tables BU-C-BU-A showing start address of various interruption processing routines, and auxiliary control memory part E-ROM102 is with the microaddress of a 2nd micro-step; when interruption control signal E/I is nt out at interruption check timing in the finol step of one instruction process, the output operation of E-ROM102 is inhibited and an address is stored in branch instruction assignment address register 103 as an address of P- ROM101 outputted from gates G1-G3 having received interruption signals A-C by types, thereby making jumps to address of respective processing routines in the priority order of types A-C.
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申请人：TOKYO SHIBAURA ELECTRIC CO牛肉板面
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