LTC239116f

更新时间:2023-05-13 14:39:58 阅读: 评论:0

239116f
TYPICAL APPLICATION
DesCrIPTION
with 94dB SNR
The L TC ®2391-16 is a low noi, high speed 16-bit suc-cessive approximation register (SAR) ADC. Operating from a single 5V supply, the L TC2391-16 supports a large ±4.096V fully differential input range, making it ideal for high performance applications which require maximum dynamic range. The L TC2391-16 achieves ±2LSB INL max, no missing codes at 16-bits and 94dB SNR (typ).The L TC2391-16 includes a precision internal reference with a guaranteed 0.5% initial accuracy and a ±20ppm/°C (max) temperature coefficient. Fast 250ksps throughput with no cycle latency in both parallel and rial interface modes makes the L TC2391-16 ideally suited for a wide variety of high speed applications. An internal oscillator ts the conversion time, easing external timing consider-ations. The L TC2391-16 di
省考常识
ssipates only 95mW at 250ksps, while both nap and sleep power-down modes are provided to further reduce power during inactive periods.
FeATures
APPLICATIONs
n
250ksps Throughput Rate n  ±2LSB INL (Max)
n  Guaranteed 16-Bit No Missing Codes n  94dB SNR (Typ) at f IN  = 20kHz n  Guaranteed Operation to 125°C n  Single 5V Supply
n  1.8V to 5V I/O Voltages n  95mW Power Dissipation
n  ±4.096V Differential Input Range n  Internal Reference (20ppm/°C Max)n  No Pipeline Delay, No Cycle Latency n  Parallel and Serial Interface n  Internal Conversion Clock
n
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48-Pin 7mm × 7mm LQFP and QFN Packages
n
Medical Imaging
n  High Speed Data Acquisition n  Digital Signal Processing n  Industrial Process Control n  Instrumentation n
ATE
16k Point FFT f S  = 250ksps,
f IN  = 20kHz
L , L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
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大智若愚反义词
0SNR = 94dB THD  –103dB SINAD = 93.5dB SFDR = 104dB
239116f
教师工作总结个人Supply Voltage (V AVP , V DVP  , V OVP ) ..........................6.0V Analog Input Voltage (Note 3)
IN +, IN –, REFIN, CNVST  ..(GND – 0.3V) to (V AVP  + 0.3V)Digital Input Voltage ........(GND – 0.3V) to (V OVP  + 0.3V)Digital Output Voltage .....(GND – 0.3V) to (V OVP  + 0.3V)Power Dissipatio
n ...............................................500mW
(Notes 1, 2)
OrDer INFOrmATION
LEAD FREE FINISH TAPE AND REEL PART MARKING*PACKAGE DESCRIPTION TEMPERATURE RANGE L TC2391CUK-16#PBF L TC2391CUK-16#TRPBF L TC2391UK-1648-Lead 7mm × 7mm Plastic QFN 0°C to 70°C L TC2391IUK-16#PBF L TC2391IUK-16#TRPBF L TC2391UK-1648-Lead 7mm × 7mm Plastic QFN –40°C to 85°C LEAD FREE FINISH TRAY
PART MARKING*PACKAGE DESCRIPTION TEMPERATURE RANGE L TC2391CLX-16#PBF L TC2391CLX-16#PBF L TC2391LX-1648-Lead 7mm × 7mm Plastic LQFP 0°C to 70°C L TC2391ILX-16#PBF L TC2391ILX-16#PBF L TC2391LX-1648-Lead 7mm × 7mm Plastic LQFP –40°C to 85°C L TC2391HLX-16#PBF
L TC2391HLX-16#PBF
L TC2391LX-16
48-Lead 7mm × 7mm Plastic LQFP
–40°C to 125°C
Consult L TC Marketing for parts specified with wider operating temperature ranges.  *The temperature grade is identified by a label on the shipping container .Consult L TC Marketing for information on non-standard lead bad finish parts.
For more information on lead free part marking, go to: www.linear .com/leadfree/
For more information on tape and reel specifications, go to: www.linear .com/tapeandreel/
AbsOLuTe mAxImum rATINgs TOP VIEW
49GND
UK PACKAGE
48-LEAD (7mm s  7mm) PLASTIC QFN
GND 1AVP 2DVP 3SER/PAR  4
GND 5OB/2C  6GND 7BYTESWAP 8
D0 9D1 10D2 11D3 12
36 VCM 35 GND 34CNVST 33 PD 32 RESET 31CS 30RD 29 BUSY 28 D1527 D1426 D1325 D12
48 G N D
47 A V P 46 A V P 45 A V P 44 G N D 43 I N +42 I N –
41 G N D 40 A V P 39 R E F S E N S E 38 R E F I N 37 R E F O U T
D 413D 5 14D 6 15D 7 16O G N D 17O V P  18D V P 19G N D 20 D 8 21D 9/S D I N  22D 10/S D O U T  23D 11/S C L K  24
T JMAX  = 125°C, θJA  = 29°C/W
EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB
1234
5678
9101112
363534333231302928272625GND AVP DVP SER/PAR GND OB/2C GND BYTESWAP D0D1D2D3131415161718192021222324
D 4D 5D 6D 7O G N D O V P D V P G N D D 8D 9/S D I N D 10/S D O U T D 11/S C L K 484746454443424140393837
G N D A V P A V P A V P G N D I N +I N –
G N D A V P R E F S E N S E R E F I N R E F O U T
留题阁皂观VCM GND CNVST PD RESET CS RD BUSY D15D14D13D12
TOP VIEW
LX PACKAGE
48-LEAD (7mm s  7mm) PLASTIC LQFP
T JMAX  = 125°C, θJA  = 55°C/W
PIN CONFIgurATION
Operating Temperature Range
L TC2391C ................................................0°C to 70°C  –40°C to 85°C  L TC2391H ..........................................–40°C to 125°C Storage Temperature Range ...................–65°C to 150°C
ANALOg INPuT The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IN+Absolute Input Range (IN+)(Note 5)l–0.05AVP V V IN–Absolute Input Range (IN–)(Note 5)l–0.05AVP V V IN+ – V IN–Input Differential Voltage Range V IN = V IN+ – V IN–l–V REF V REF V V CM Common Mode Input Range l V REF/2 – 0.05V REF/2V REF/2 + 0.05V I IN Analog Input Leakage Current l±1µA
C IN Analog Input Capacitance Sample Mode
Hold Mode 45
5
pF
pF
CMRR Input Common Mode Rejection Ratio70dB CONverTer ChArACTerIsTICs The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Resolution l16Bits No Missing Codes l16Bits T ransition Noi 0.3LSB RMS INL Integral Linearity Error(Note 6)l–2±12LSB DNL Differential Linearity Error l–11LSB BZE Bipolar Zero Error(Note 7)l–77LSB Bipolar Zero Error Drift1ppm/°C
FSE Bipolar Full-Scale Error External Reference
Internal Reference (Note 7)l0.14
0.1
%
%
Bipolar Full-Scale Error Drift±10ppm/°C DYNAmIC ACCurACY The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. A IN = –1dBFS (Notes 4, 8)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS SINAD Signal-to-(Noi + Distortion) Ratio f IN = 20kHz l90.593.5dB SNR Signal-to-Noi Ratio f IN = 20kHz l9194dB THD Total Harmonic Distortion f IN = 20kHz, First 5 Harmonics l–103–94dB SFDR Spurious-Free Dynamic Range f IN = 20kHz104dB –3dB Input Bandwidth50MHz Aperture Delay0.5ns Aperture Jitter7ps RMS T ransient Respon Full-Scale Step60ns
239116f
PARAMETER CONDITIONS MIN TYP MAX UNITS V REF Output Voltage I OUT = 0    4.076  4.096  4.116V V REF Output Tempco I OUT = 0 (I-, H-Grades) (Note 11)l±10±20ppm/°C V REF Output Impedance–0.1mA ≤ I OUT ≤ 0.1mA  2.6kΩExternal Reference Voltage  2.5  4.096AVP – 0.5V REFIN Input Impedance85kΩV REF Line Regulation AVP = 4.75V to 5.25V0.3mV/V VCM Output Voltage I OUT = 0    2.08V
DIgITAL INPuTs AND DIgITAL OuTPuTs The l denotes the specifications which apply over the full op
erating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IH High Level Input Voltage l0.8 • OVP V V IL Low Level Input Voltage l0.5V I IN Digital Input Current V IN = 0V to OVP l–1010µA C IN Digital Input Capacitance5pF V OH High Level Output Voltage I O = –500µA l OVP – 0.2V V OL Low Level Output Voltage I O = 500µA l0.2V I OZ Hi-Z Output Leakage Current V OUT = 0V to OVP l–1010µA I SOURCE Output Source Current V OUT = 0V–10mA I SINK Output Sink Current V OUT = OVP10mA POwer requIremeNTs The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V AVP , V DVP Supply Voltage l  4.755  5.25V V OVP Supply Voltage  1.71  5.25V
I DD Supply Current
Power Down Mode 250ksps Sample Rate with Nap Mode
Conversion Done and All Digital Inputs Tied to OVP
l
l
19
35
25
250
mA
µA
P D Power Dissipation
Power Down Mode 250ksps Sample Rate with Nap Mode
Conversion Done and All Digital Inputs Tied to OVP
95
175
125
1250
mW
µW
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INTerNAL reFereNCe ChArACTerIsTICs The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
239116f
TImINg ChArACTerIsTICs The l denotes the specifications which apply over the full operating temperature range, otherwi specifications are at T A = 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS f SMPL Sampling Frequency l250ksps t CONV Conversion Time  l2500ns t ACQ Acquisition Time l1485 ns t4CNVST Low Time l20ns t5CN
VST High Time l250ns t6CNVST↓ to BUSY Delay C L = 15pF l15ns t7RESET Pul Width l5ns t8SCLK Period(Note 9)l12.5ns t9SCLK High Time l4ns t10SCLK Low Time l4ns t r , t f SCLK Ri and Fall Times(Note 10)1µs t11SDIN Setup Time l2ns t12SDIN Hold Time l1ns t13SDOUT Delay After SCLK↑C L = 15pF l28ns t14SDOUT Delay After CS↓l8ns t15CS↓ to SCLK Setup Time l20ns t16Data Valid to BUSY↓l1ns t17Data Access Time after RD↓ or BYTESWAP↑l10ns t18Bus Relinquish Time l10ns
Note 1: Stress beyond tho listed under Absolute Maximum Ratings may cau permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: All voltage values are with respect to ground.
Note 3: When the pin voltages are taken below ground or above  AVP, DVP or OVP, they will be clamped by internal diodes. This product can handle input currents up to 100mA below ground or above AVP, DVP or OVP without latchup.
Note 4: AVP = DVP = OVP = 5V, f SMPL = 250ksps, external reference equal to 4.096V unless otherwi noted.
Note 5: Recommended operating conditions.
坐龙峡Note 6: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band.Note 7: Bipolar zero error is the offt voltage measured from –0.5LSB when the output code flickers between 0000 0000 0000 0000 and 1111 1111 1111 1111. Bipolar full-scale error is the worst-ca of –FS or +FS untrimmed deviation from ideal first and last code transitions and includes the effect of offt error.
Note 8: All specifications in dB are referred to a full-scale ±4.096V input with a 4.096V reference voltage.
Note 9: t13 of 8ns maximum allows a shift clock frequency up to
2 • (t1
3 + t SETUP) for falling edge capture with 50% duty cycle and up to 80MHz for rising capture. t SETUP is the t-up time of the receiving logic. Note 10: Guaranteed by design.
Note 11: Temperature coefficient is calculated by dividing the maximum change in output voltage by t
he specified temperature range.
Figure 1. Voltage Levels for Timing Specifications
239116f

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