Octal, 12-/16-Bit DAC, SPI, 5 ppm/°C On-
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FEATURES
鉴真和尚Low power, pin-compatible octal DACs AD5668: 16 bits AD5628: 12 bits
AD5668/AD5628 in 16-lead LFCSP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference Power down to 400 nA @ 5 V, 200 nA @ 3 V 2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on ret to zero scale or midscale 3 power-down functions
Hardware LDAC and LDAC override function CLR APPLICATIONS
function to programmable code Rail-to-rail operation
Optical transceivers Power Amp control
Data acquisition systems
Digital gain and offt adjustment FUNCTIONAL BLOCK DIAGRAM
标准化学校
O UT H
O UT A
O UT B
O UT C
O UT D
O UT E
O UT F
O UT G
0000
补肾气的中药酒店发票Figure 1.
GENERAL DESCRIPTION
The AD5628/AD5668 devices are low power, octal,
12-/16-bit, buffered voltage-output DACs. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design.
The AD5628/AD5668 have an on-chip reference with an
internal gain of 2. The AD5628/AD5648/AD5668-1 have a 1.25 V 5 ppm/°C reference, giving a full-scale output range of 2.5 V; the AD5628/AD5668-2, -3 have a 2.5 V 5 ppm/°C reference,
giving a full-scale output range of 5 V . T he on-board reference is off at power-up, allowing the u o
方叶f an external reference. The internal reference is enabled via a software write.
The part incorporates a power-on ret circuit that ensures that the DAC output powers up to 0 V (AD5628/AD5668-1, -2) or
midscale (AD5668-3) and remains powered up at this level until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software-lectable output loads while in power-down mode for any or all DAC channels.
The outputs of all DACs can be updated simultaneously using the LDAC function, with the added functionality of ur-lectable DAC channels to simultaneously update. There is also an asynchronous PRODUCT HIGHLIGHTS
CLR that updates all DACs to a ur-programmable code—zero scale, midscale, or full scale. The AD5628/AD5668 utilize a versatile 3-wire rial interface that operates at clock rates of up to 50 MHz and is compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The on-chip precision output amplifier enables rail-to-rail output swing.
1. Octal, 12-/16-bit DAC.
2. On-chip 1.25 V/2.5 V , 5 ppm/°C reference.
3. Available in 16-lead LFCSP .
4. Power-on ret to 0 V or midscale.
5.
Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V .
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
00000000
1211101
34
V D V F
V H 9
C L R
L D A C
V 2
S Y N C
V A 6
V E 5
傣族的节日
V C 7
V G 8
V /V 16S C L K
15D I N
致教师14GND 13V B TO P VIEW
DD
OUT OUT OUT O U T R E F I N O U T OUT OUT R E F O U T OUT A D 5668A D 5628
Figure 2. 16-Lead LFCSP (CP-16-17)
Table 1. Pin Function Descriptions
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OUTLINE DIMENSION
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
012909-B
0.400.35
0.800.750.08
Figure 2. 16-Lead Frame Chip Scale Package [LFCSP]
古代女尸(CP-16-17)
Dimensions shown in millimeters
©2010 Analog Devices, Inc. All rights rerved. Trademarks and registered trademarks are the property of their respective owners.
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