FEATURES APPLICATIONS
DV DD
DOUT
LDAC
MODE
REF
OUTD
OUTC
OUTB江上往来人下一句
OUTA
AV DD
DW OR PW PACKAGE
(TOP VIEW)
DESCRIPTION
TLV5608
TLV5610
TLV5629
SLAS268E–MAY2000–REVISED MARCH2004
8-CHANNEL,12-/10-/8-BIT,2.7-V TO5.5-V LOW POWER
DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
•Digital Servo Control Loops •Eight Voltage Output DACs in One Package
•Digital Offt and Gain Adjustment –12-Bit
读书日•Industrial Process Control
–10-Bit
山下的女人是老虎•Machine and Motion Control Devices –8-Bit
•Mass Storage Devices
•Programmable Settling Time vs Power
Consumption
–1µs In Fast Mode
–3µs In Slow Mode
•Compatible With TMS320and SPI™Serial
Ports
•Monotonic Over Temperature
•Low Power Consumption:
–18mW In Slow Mode at3-V
–48mW In Fast Mode at3-V
•Reference Input Buffers
•Power-Down Mode
•Buffered,High Impedance Reference Inputs
•Data Output for Daisy-Chaining
The TLV5610,TLV5608,and TLV5629are pin-compatible,eight-channel,12-/10-/8-bit voltage output DACs each with a flexible rial interface.The rial interface allows glueless interface to TMS320and SPI,QSPI,and Microwire rial ports.It is programmed with a16-bit rial string containing4control and12data bits.
Additional features are a power-down mode,an LDAC input for simultaneous update of all
eight DAC outputs, and a data output which can be ud to cascade multiple devices.
The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable t
tling time to allow the designer to optimize speed vs power dissipation.The buffered,high-impedance reference input can be connected to the supply voltage.
Implemented with a CMOS process,the DACs are designed for single-supply operation from2.7V to5.5V.The devices are available in20-pin SOIC and TSSOP packages.
AVAILABLE OPTIONS
Plea be aware that an important notice concerning availability,standard warranty,and u in critical applications of Texas
Instruments miconductor products and disclaimers thereto appears at the end of this data sheet.
SPI is a trademark of Motorola,Inc.
元器件交易网
OUTA
REF
SCLK DIN FS MODE DOUT
阴瑜伽
OUT PRE
LDAC
B, C, D,E, F , G and H
TLV5608
TLV5610
TLV5629
SLAS268E–MAY 2000–REVISED MARCH 2004害臊
The devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
Terminal Functions
元器件交易网
ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS
TLV5608
TLV5610
TLV5629 SLAS268E–MAY2000–REVISED MARCH2004
over operating free-air temperature range(unless otherwi noted)(1)
(1)Stress beyond tho listed under absolute maximum ratings may cau permanent damage to the device.The are stress ratings
only,and functional operation of the device at the or any other conditions beyond tho indicated under recommended operating
conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
因式分解定义
over recommended operating free-air temperature range,supply voltages,and reference voltages(unless otherwi noted)
(1)Power supply rejection ratio at full scale is measured by varying AV DD and is given by:
PSRR=20log[(E G(AV DD max)-E G(AV DD min))/V DD max]
元器件交易网
咪咪咪
ELECTRICAL CHARACTERISTICS (CONTINUED)
TLV5608
TLV5610
狄利克雷定理TLV5629
SLAS268E–MAY 2000–REVISED MARCH 2004
over recommended operating free-air temperature range,supply voltages,and reference voltages (unless otherwi noted)
(1)
Reference feedthrough is measured at the DAC output with an input code =0x000.
元器件交易网
ELECTRICAL CHARACTERISTICS(CONTINUED) TIMING REQUIREMENTS
TLV5608
TLV5610
TLV5629 SLAS268E–MAY2000–REVISED MARCH2004
over recommended operating free-air temperature range,supply voltages,and reference voltages(unless otherwi noted)
(1)Settling time is the time for the output signal to remain within+0.5LSB of the final measured value for a digital input code change of
0x80to0xFFF and0xFFF to0x080,respectively.Assured by design;not tested.
(2)Settling time is the time for the output signal to remain within+0.5LSB of the final measured value for a digital input code change of one
count.The max time applies to code changes near zero scale or full scale.Assured by design;not tested.
(3)Slew rate determines the time it takes for a change of the DAC output from10%to90%full scale voltage.
(4)Code transition:TLV5610-0x7FF to0x800,TLV5608-0x7FC to0x800,TLV5629-0x7F0to0x800
元器件交易网
