12.Embedded Multipliers in
Cyclone II Devices CII51012-1.2
Introduction U Cyclone II FPGAs alone or as digital signal processing (DSP)
co-processors to improve price-to-performance ratios for DSP
applications. You can implement high-performance yet low-cost DSP
systems with the following Cyclone II device features and design
support:
■Up to 150 18 x 18 multipliers
■Up梦到发大水
to 1.1 Mbit of on-chip embedded memory
■High-speed interface to external memory
■DSP Intellectual Property (IP) cores
■DSP Builder interface to the Mathworks Simulink and Matlab design
environment
■DSP Development Kit, Cyclone II Edition
This chapter focus on the Cycl自我成长作文
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one II embedded multiplier blocks.
Cyclone II devices have embedded multiplier blocks optimized for
multiplier-intensive low-cost DSP applications大学开学时间
. The embedded
multipliers combined with the flexibility of programmable logic devices
(PLDs), provide you with the ability to efficiently implement various cost
nsitive DSP functions easily. Consumer-bad application systems such
as digital television (DTV) and home entertainment systems typically
require a cost effective solution for implementing multipliers to perform
signal processing functions like finite impul respon (FIR) filters, fast
Fourier transform (FFT) functions, and discrete cosine transform (DCT)
functions.
Along with the embedded multipliers, the M4K memory blocks in
Cyclone II devices also support various soft multiplier implementations.
The, in combination with the embedded multipliers increa the
available number of multipliers in Cyclone II devices and provide the
ur with a wide variety of implementation options and flexibility when
designing their systems.
f See the Cyclone II Device Family Data Sheet ction in Volume 1 of the
Cyclone II Device Handbook for more information on Cyclone II
devices.
Embedded Multiplier Block Overview
Embedded Multiplier Block Overview Each Cyclone II device has one to three columns of embedded multiplier绿化率
s that implement multiplication functions. Figure12–1 shows one of the embedded multiplier columns with the surrounding LABs. Each embedded multiplier can be configured 清洁工作文
to support one 18 18 multiplier or two 9 9 multipliers.
Figure12–1.Embedded Multipliers Arrang太极拳口诀心法
ed in Columns with Adjacent LABs
Cyclone II Device Handbook, Volume 1
