Draft Standard Physical and Environmental Layers for PCI Mezzanine Cards:作文发现
PMC
Sponsored by the
Microprocessor & Microcomputer Standards Committee (MMSC)
of the IEEE Computer Society
P1386.1/Draft 2.4
January 12, 2001
Draft submitted to IEEE for final standardization approval
Abstract: This draft standard, in conjunction with P1386 (CMC), defines the physical and environmental layers of a PCI Mezzanine Card (PMC) Family to be usable on (but not limited to) single slot VME, VME64 & VME64x boards, CompactPCI Boards, Multibus I boards, Multibus II boards, desktop computers, portable computers, vers and similar types of applications. The electrical and logical lay
ers are bad on the PCI Specification from the PCI Special Interest Group. The PCI Mezzanine Cards allow for a variety of optional function expansions for the host system. I/O functionality from the PMC may be either through the mezzanine front panel, or via the backplane by routing the I/O signals through the mezzanine connector to the host. Keywords: Backplane I/O, Bezel, Board, Card, CompactPCI, Face Plate, Front Panel I/O, Metric, Host Computer, I/O, Local Bus, Mezzanine, Module, Modular I/O, PCI, Multibus I, Multibus II, VME, VME64, VME64x, VMEbus.
Copyright (c) 2001 by the Institute of Electrical and Electronics Engineers, Inc.
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Comments
If you have questions or comments regarding this draft, plea contact the chair/draft editor of this propod standard:
Wayne Fischer
P1386.1 (PMC) Chair & Draft Editor
Tahoe Embedded Computers
PO Box 8600
Incline Village, NV 89452-8600 USA
Ph: 775-832-0447
Em: tahoewayne@nvbell
Ws:
Change Bars
All paragraphs changed in this draft (2.4) from draft 2.3 are marked with a change bar on the right side of the paragraph. Any table entry that was changed will have a thicker vertical line on the right side of changed entry.
Introduction
(This introduction is not part of this Draft Standard Physical and Environmental Layers for a PCI Mezzanine Card: PMC)
This draft standard provides the specifications for implementing the PCI local bus between a host and mezzanine card bad on the P1386 (CMC) Standard for usage on VME64x boards, CompactPCI boards, and Multibus I & II boards. PCI boards defined for the general personal computer market will not fit on the boards since they mount perpendicular on the host computer. This standard provides the necessary mechanical and environmental requirements for the u of PCI bad mezzanine cards in a large variety of low profile applications. PCI Mezzanine Cards can
provide front bezel I/O, backplane I/O via the host, additional local host functions or a combination of the three.
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Special thanks are due to Dave Moore, original P1386.1 Working Group Draft Editor, for the generation of the many drafts, Rick Spratt, Cliff Lupien, Harry Parkinson, Chau Pham and Heinz Horstmeier for their contribution to development of this propod standard.
At the time this standard was completed, the P1386.1 Working Group had the following membership:
Wayne Fischer, Chair
Chau Pham, Vice Chair
Malcom Airst Dave Horton Harry Parkinson
Harry Andreas Anotol Kaganovich Elwood Parsons
James Barnette Gary Kidwell Chau Pham
Juergen Baumann Tom Kuleza Dave Rios
Martin Blake Jing Kowk John Rynearson
Hans Brand Dees Lambresht Richard Spratt
Dave Brearley Sang Dae Lee Nobuaki Sugiura
Gorky Chin Cliff Lupien Dennis Terry
Dick DeBock Kristian Martinson Russ Tuck
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Ian Dobson Jim Medeiros Jim Turley
Wayne Fischer Robert McKee Mark Vorenkarmp
Mike Hanfratz Dave Mendenhall Eike Waltz
Ryuji Hayasaka David Moore Dave Wickliff
Roger Hinsdale Rob Noffke Bob Widlicka
Heinz Horstmeier Joph Norris David Wright
The following people were on the IEEE sponsor balloting committee:
List to be provided,
When the IEEE Standards Board approved this standard on XX Xxxx, 2001, it had the following membership:
List to be provided,
Also included are the following nonvoting IEEE Standard Board liaisons:
List to be provided,
Contents
1.Overview (1)
1.1Scope (1)
1.2Purpo (1)
1.3General Arrangement (1)
1.4Dimensions (1)
2.References (3)
2.1Trademarks (3)
3.Definitions, Abbreviations and Terminology (3)
火车发展史3.1Special Word Usage (3)
4.Mechanics and Compliance (3)
4.1Conformance (3)
4.2PMC Voltage Keying (4)
4.3Connector Configurations (4)
4.4Power Consumption, Heat Dissipation and Air Flow (4)
4.5Electromagnetic Compatibility (4)
4.6Shock and Vibration (4)
4.7Environmental (4)
4.8MTBF (4)
5.Electrical and Logical Layer (5)
5.1Connector Utilization (5)
5.2PMC Connector Pin Assignment (5)
5.3Comparison of Pin Usage, PCI to PMC (9)
5.4Mapping of PCI Rerve Pins (10)
Figures
Figure1-1Typical PMC Mounted to a Host Module (2)
Figure5-1Connector Orientation on PMC, Side 1 (8)
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Figure5-2Connector Orientation on Host, Side 1 (8)
Tables
Table5-1PMC Connectors Pin Assignments (6)
Table5-2Pin U Comparison PCI to PMC (Single Size) (9)
Table5-3PCI-Rerved/PMC Relationship (10)
