HSMP-3816
Quad PIN Diode π Attenuator 300 kHz to 4 GHz in SOT 25 Package
Data Sheet
Note:
Package marking provides orientation and identification “AT”= Device Code
“x” = Month code indicates the month of manufacture
1
ATx
2
3
4
5
Pin 2 :Series Bias
Pin 3 :RF In/Out Pin 1 :RF In/Out
Pin 4 :Shunt Bias Pin 5 :Shunt
Bias
Description
Avago Technologies’ HSMP-3816 is a wideband, low inrtion loss, high IIP3, Quad PIN Attenuator in a low cost surface mount SOT-25 package. It provides a good match and flat attenuation over an extremely wide band from 300 kHz to 4 GHz.
The SOT-25 packages gives a reduction in part count and takes up less space on board compared to multi package solutions.
Four PIN Diodes in one package encourages performance repeatability for improved production yield at board level.
Package Marking and Pin connections
Features
• 4 PIN Diodes in a SOT-25 package • 300 kHz to 4 GHz usable frequency band • High Linearity • Low inrtion Loss • MSL-1 and Lead-free
• Tape & Reel packaging option available
Specification At 1 GHz, V+=5V
• IIP3 = 45 dBm (Typical)• Attenuation = 38 dB (Typical)• Inrtion Loss = -3 dB (Typical)• Return Loss = - 22 dB (Typical)
Applications
• Broadband system application (i.e., CATV, WCDMA, etc)
• General purpo Voltage-Control-Attenuator for high linearity applications.
Symbol
Parameter
Unit
质量体系管理
Abs Max
I f Forward Current (1 µs Pul)Amp 1P IV Peak Inver Voltage V 100T j Junction Temperature °C 150T stg Storage Temperature °C -60 to 150q lb Thermal Resistance [2]°C/W 167P In
Input Power [3]
W
1.0
Notes:
1. Operation in excess of any one of the conditions may result in permanent damage to the device.
2. Thermal Resistance is measured from junction to board using IR method.
3. The Max Input Power is tested using demoboard as shown in Figure 1 at the worst-ca (highest attenuation) bias condition of V+=5V, Vc=0V.
Carrier Lifetime t (ns)
Rever Recovery Time T rr (ns)
Total Capacitance C T (pF)
1500
300
0.27Test
Condition
I F = 50mA I R = 250 mA
V R = 10 V I F = 20 mA 90% Recovery
V R = 50V f = 1MHz
Typical Performance for HSMP-3816 Quad PIN Diode π Attenuator @ +25o C
Parameter
Test Condition
Units
Typical
Inrtion Loss Vc = 15V, V+ = 5V, Freq = 1GHz dB -3.0Return Loss Vc = 0V, V+ = 5V, Freq = 1GHz dB -22Attenuation Vc = 0V, V+ = 5V, Freq = 1GHz dB 38Input IP3Vc = 1.5V, V+ = 5V, Freq = 1GHz dBm 45Input IP3Vc = 15V, V+ = 5V, Freq = 1GHz dBm 42Input IP3Vc = 1.5V, V+ = 5V, Freq = 100MHz dBm 37Input IP3Vc = 15V, V+ = 5V, Freq = 100MHz dBm 37Input IP3Vc = 1.5V, V+ = 5V, Freq = 30MHz dBm 35Input IP3
Vc = 15V, V+ = 5V, Freq = 30MHz
dBm
35
Notes :
1. Measurement above obtained using Wideband RF circuit design shown in Figure 1 & 2
Typical Performance, Tc = +25o C (Each Diode)
Absolute Max Ratings [1], Tc = +25o C
Electrical Specifications, Tc = +25o C (Each Diode)
Minimum Breakdown Voltage V BR (V)
Maximum Total
Capacitance C T (pF)
Minimum Resistance at I F = 0.01mA,R H (Ω)
Maximum Resistance at I F = 20mA,R L (Ω)
Maximum Resistance at I F = 100mA, R T (Ω)
Resistance at I F = 1mA,R M (Ω)
100
0.35150010 3.045 to 80Test
Conditions
V R = V BR Measure I R ≤ 10uA
V R = 50V f = 1MHz
I F = 0.01mA f = 100MHz
I F = 20mA f = 100MHz
I F = 100mA f = 100MHz
I F = 1mA f = 100MHz
Note : Rs parameters are tested under AQL 1.0
Vc
Via Hole to GND
Via Hole to GND
to GND
V+C1
C3
C2
R3
R1
C4
R4
R4R5
C5
ATx
R2
Component
Value
R1,R2560 Ohm R3330 Ohm R41500 Ohm R5680 Ohm C1-C5
47000 pF
Figure 1. Wideband Quad PIN Diode π Attenuator Circuit Figure 2. Circuit Board Layout
Typical Performance Curves for Single Diode@ Tc = +25o
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C,
0.10 1.0010.00IF - Forward Bias Current (mA)
R F R e s i s t a n c e (O H M S )
0.01
0.10
1.00
10.00
100.00
00.2
0.40.60.81 1.2
VF- Forward Voltage (V)
I F - F o r w a r d C u r r e n t (m A )
+125°C
+25°C
- 50°C
0.15
0.200.250.300.350.400.450.500.550.60
4
81216
20
Rever Voltage (V)
T o t a l C a p a c i t a n c e (p F )
F=1 MHz F=10 MHz
Figure 3. RF Resistance vs. Forward Bias Current
Figure 4. Forward Current vs. Forward Voltage
Figure 5. RF Capacitance vs Rever Bias
Typical Performance Curves for HSMP-3816, @ V+ = 5V, Tc = +25o C
Note:
1. Measurements above were obtained using Wideband RF circuit design shown in Figures 1 and
2.
2. Typical values were derived using limited samples during initial product characterization and may not be reprentative of the overall distribution.
202530354045
50
Vc - Control Voltage (V)
I P 3 - I n p u t (d B m )
024681012141618
5
1015
20
Control Voltage Vc (Volts)
S e r i e s D i o d e B i a s C u r r e n t - I s e r i e s (m A )
00.20.4
0.60.811.21.41.6
1.82S h u n t D i o d e B i a s C u r r e n t - I s h u n t (m A )
I ries
I shunt
051015202530354045-40
-20
204060
80Temp (Degree C)
A t t e n u a t i o n (d
B ) 2.4V Vc=0V 1.1V 1.3V 1.7V
那根拉山口6V 15V Figure 7. Inrtion Loss vs. Frequency
Figure 8. Return Loss vs. Frequency
低糖Figure 6. Attenuation vs. Control Voltage Figure 9. Input IIP3 vs. Control Voltage
Figure 10. Series & Shunt Diode Bias Current vs. Control Voltage
Figure 11. Attenuation vs. Temperature
Frequency (MHz)
I n s e r t i o n L o s s (d B )
快4-50
-40-30
-20
-10
010
100
1000
Frequency (MHz)
R e t u r n L o s s
(d B )
Vc=0V
Vc=15V
1Control Voltage Vc (Volts)
A t t e n u a t i o n (d
B )
Package Outline & Dimension
PCB Footprint
PLANE水利工程造价
Symbol Dimension
Minimum Nominal Maximum D 2.80 2.9 3.00H 2.60 2.80 3.00E 1.50 1.60 1.70e1 1.88 1.90 1.92e 0.930.950.97B 0.380.400.42A20.90 1.0
1.10C 0.15
0.18L2L 0.40.6A10.00.10
A
0.90打屁板
1.3
笔墨伺候0.0741.90.0370.95
0.0280.7
0.0942.4
0.039DIMENSIONS IN
mm
Inches Device Orientation
Top View
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