LPC32x0 startup code
Table of contents
1 Introduction (5)
1.1 Overview of this document (6)
1.2 Stage 1 loader (7)
2 LPC32x0 boot process (9)
2.1 LPC32x0 boot options (9)
2.1.1 UART boot (9)
2.1.2 NOR FLASH boot (10)
2.1.3 SPI FLASH/EEPROM boot (10)
2.1.4 NAND FLASH boot (10)
3 Startup and board code (11)
3.1 Startup code (11)
3.1.1 Startup code configuration (12)
3.1.2 Startup code build time configuration (16)
3.2 Board code (17)
3.2.1 Information on bad block support (18)
3.2.2 Board code tweaks and configuration (18)
4 Applications – boot loaders, burner software, and stage 1 applications (22)
4.1 Boot loaders – kickstart and stage 1 applications (22)
4.1.1 Kickstart loader (23)
4.2 Stage 1 applications (27)
4.3 Kickstart and stage 1 application scenarios (27)
4.3.1 Examples with the Phytec 3250 board (27)
4.3.2 S1L and the Embedded Artists 3250 board using large block NAND FLASH (29)
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4.4 Burner software (29)
4.4.1 How the burner software works (30)
4.4.2 Burner software configuration (31)
5 Serial Loader tool (32)
可爱颂歌曲5.1 Serial Loader tool u (32)
5.1.1 Serial Loader tool example using S1L for IRAM (33)
5.1.2 Serial Loader tool example using burner software (34)
6 Stage 1 Loader (36)
6.1 Stage 1 loader startup (36)
6.2 Stage 1 loader resource usage (37)
6.2.1 IRAM organization (37)
6.2.2 Stage 1 loader persistent data storage (38)
6.3 Stage 1 loader monitor program operations (38)
6.3.1 Accessing the monitor program (39)
6.3.2 Monitor program commands (39)
6.3.3 Loading and executing files (49)
6.3.4 Saving files in FLASH (51)
内分泌失调长痘痘6.3.5 Setting up autoboot (52)
6.3.6 Load, save, and boot examples (52)
7 Build process and examples (55)
7.1 Make bad build environment (55)
7.1.1 Setting up the build environment (55)
7.1.2 Test build an example (56)
7.1.3 Cleaning up code (57)
7.1.4 Altering build options (58)
7.2 Startup code compilation flags (58)
7.3 Build and deployment examples (59)
7.3.1 Board with DDR mobile SDRAM and large block Micron NAND FLASH with plans to run
Linux 59
7.3.2 Board with SDR standard SDRAM, small block Samsung NAND FLASH, and SPI FLASH
62
7.3.3 Using u-boot on the Phytec 3250 board without S1L (66)
8 Notes & information (68)
8.1 Special notes about u-boot, eboot, and S1L (68)
8.2 Various image sizes using different toolchains (69)
8.2.1 CodeSourcery GNU compilers (69)
8.2.2 Realview compilers (70)
8.2.3 Keil compilers (71)
8.3 Board and driver timing values (71)
8.4 WinCE and rerved block marking (71)
8.5 Special S1L support for SDRAM testing (71)
8.6 Known issues with S1L (72)
8.6.1 MMUENAB command sometimes hangs (72)
老师评语怎么写8.6.2 INFO shows image loaded in memory on ABOOT failure (72)
8.7 Building S1L to boot from NOR FLASH (72)
List of tables
Table 1 Kickstart and stage 1 application small block NAND FLASH data organization 24 Table 2 Kickstart and stage 1 application large block NAND FLASH data organization 24 Table 3 Kickstart loader operation 24 Table 4 Possible kickstart and stage 1 application SPI FLASH data organization 26 Table 5 Kickstart loader operation 26 Table 6 Burner sources for various boot methods 29 Table 7 Serial Loader and burner quence 30 Table 8 IRAM organiztion for stage 1 loader 38 Table 9 Support image load options 50 Table 10 Image sizes generated with the GNU compiler 69
Table 11 Image sizes generated with the Realview compiler 70
1 Introduction
This document provides important information on developing and using the NXP provided startup code and boot loaders for the LPC32x0 processors. The code provided with this package is intended to provide a starting point for LPC32x0 system developers to get their products up and running fast.
This document also explains the topic of boot loaders and the LPC32x0 boot process. Included with the startup code are veral different variants of boot loaders that allow booting from different boot device types. Reference software to burn the boot loader image into FLASH or download the boot loader directly into memory is also provided with this package.
Overall, this package provides the following features:
•Configurable and scalable startup code
o Can optionally tup a basic MMU page table
o Can optionally tup the board functions (clocking, SDRAM, GPIOs)
o Full configurable reference code for standard and mobile single and double data rate SDRAM initialization
o Can optionally t up runtime stacks
•Reference kickstart loader
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o Works with the startup code
o Provides initial boot capability for the LPC32x0 (boots stage 1
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application)
o Works with small and large block NAND and SPI FLASH and EEPROMs •Reference burner software
o Works with the startup code
o Provides an easy and tool-free method for burning the kickstart and stage
1 applications
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o Works with the rial loader tool provided in this package (requires UART5 to be available on system ret)
o Can burn images to small and large block NAND FLASH, SPI FLASH and EEPROMs, and NOR F
LASH
o Includes reference drivers for small and large block NAND SLC and MLC controllers, NOR FLASH, and SPI FLASH
•Stage 1 Loader (S1L)
女装销售o Works with the startup code
o A generic version of S1L is provided with this package can be loaded and ud by the kickstart loader or booted directly from NOR FLASH o Works with the rial loader tool provided in this package (requires UART5 to be available on system ret) – an image can be up and running
on a new board in less than an hour
