• Packaged as 8 pin SOIC or die • Upgrade of popular ICS502 with:
- changed multiplier table - higher operating frequencies
• Zero ppm multiplication error • Easy to cascade with other 5xx ries • Input crystal frequency of 5 - 27 MHz • Input clock frequency of 2 - 50 MHz • Output clock frequencies up to 200 MHz • Compatible
word插入横线with all popular CPUs • Duty cycle of 45/55 up to 200 MHz • Mask option for 9 lectable frequencies • Operating voltages of 3.0 to 5.5V • Industrial temperature version available • Advanced, low power CMOS process
The ICS512 LOCO™ is the most cost effective way to generate a high quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Pha-Locked-Loop (PLL) techniques, the device us a standard
fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. With a reference output, this chip plus an inexpensive crystal can replace two oscillators.
桑葚的季节Stored in the chip’s ROM is the ability to generate nine different popular multiplication factors, allowing one chip to output many common frequencies (e page 2).
This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. For applications which require defined input to output timing, u the ICS570B.
Block Diagram
Description
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CLK
VDD
GND
REF
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Pin Assignment
18234
765
X1/ICLK
VDD GND REF
X2S1S0CLK
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Pin Descriptions
Key: XI/XO = crystal connections, TI = tri-level input, O = output, P = power supply connection生日祝福语孩子
Clock Output Table
0 = connect directly to ground.1 = connect directly to VDD.
M = leave unconnected (floating).
Common Output Frequencies Examples (MHz)
Note that all of the above outputs are achieved by using a common, inexpensive 10MHz to 25MHz crystal.Consult ICS on how to achieve other output frequencies.
Electrical Specifications
Note 1: The pha relationship between input and output clocks can change at power up. For a fixed pha relationship, e the ICS570 or the ICS527.
While the information prented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its u or for the infringement of any patents or other rights of third parties, which would result from its u. No other circuits, patents, or licens are implied. This
product is intended for u in normal commercial applications. Any other applications such as tho requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS rerves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for u in life support devices or critical medical instruments.
Ordering Information
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书法字图片External Components / Crystal Selection
The ICS512 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected clo to the ICS512 to minimize lead inductance. No external power supply filtering is required for this device. A 33 Ω terminating resistor can be ud next to the CLK and REF pins. The total on-chip capacitance is approximately 15 pF, so a parallel resonant, fundamental mode crystal should be ud. For crystals with a specified load capacitance greater than 15 pF, crystal capacitors should be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of the crystal caps should be = (C L -15)*2, where C L is the crystal load capacitance in pF. The external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).
LOCO is a trademark of ICS
Package Outline and Package Dimensions
(For current dimensional specifications, e JEDEC 95.)
8 pin SOIC
