AK2500中文资料

更新时间:2023-07-20 10:27:46 阅读: 评论:0

GENERAL DESCRIPTION
The AK2500B is a DSP bad line receiver. It provides the analog receive line interface functions for a 44.736 MHz DS3 or 51.84 MHz STS-1 interface.  The device operates from a single +3.3 Volt supply and is transparent to the framing format.
PACKAGE
-24 pin SOP
FEATURE
-“Robust” DSP bad line receiver
-AK2500B Provides Complete Analog Line Receiver for DS3 and STS-1 Applications
-Provides Line Equalization, and Clock and Data Recovery Functions
APPLICATIONS麦肯锡思维
-Interfacing network transmission equipment such as SONET multiplexor and M13 to a DSX-
3 cross connect.
-Interfacing customer premis equipment to a line.
BLOCK DIAGRAM
RLOS
LOSTHR MODE2MODE1RESET
24 PIN SOP Package
IREF LOSTHR RLOL
RIN VDDA
VDDA RESET
BREF
TREF
VSSA
VSSD
RLOS MODE2 MODE1 VSSA VSSA VSSC RPDATA RNDATA RCLK VDDC VDDA VDDD EXCLK
鲍鱼营养作用与功效Note:
1)External resister 4.9 kohm is connected between IREF and VSS.
2)Input impedance of RIN is more than 5kohm.
3)Pulled up to VDD with internal register. (typical 50k ohm)
FUNCTIONAL DESCRIPTION
The AK2500B provides the basic receiver functions of a high-speed line card as shown in Fig.7.
The receiver extracts data and clock from a B3ZS coded signal and outputs clock and synchronized data.
Signal Requirements
Pul characteristics are specified at the DSX-3.
Table 1. DS3 Interface Specification
Parameter Specification
香菇炒什么好吃Line Rate44.736Mbps±20ppm
Line Code B3ZS
Test Load75Ω±5%
Standards GR-499-CORE ,  ANSI T1-102 , T1.404
Table 2. STS-1 Interface Specification
学习方法Parameter Specification
Line Rate51.840Mbps±20ppm
Line Code B3ZS
Test Load75Ω±5%
Standards GR-253-CORE ,  ANSI T1-102
Equalization
The incoming data may have the loss of cable and/or flat. Cable type and length from the cross-connect are specified as shown in Table 3. Equalizer compensates appropriately for a nominal DSX-3/STS-1 pul as attenuated by 0 - 450 feet of 728A cable.
Table 3. DS3/STS-1 Cable Specification
Parameter Specification
舒喘灵气雾剂Cable Type Type 728A coaxial cable (or equivalent)
Cable Length0 – 450 feet (from DSX-3 point)
Equalizer Bypass
If the incoming signal is attenuated by flat loss only (zero cable loss), the internal equalizer should be bypasd with MODE1=1, MODE2=1. (See Table 4)  The level of the incoming signal should satisfy the RIN input range (50mVpk - 1000mVpk for DS3/STS-1).
Table 4. Mode Control儿童免费游戏
展现的意思
MODE2 (pin24)MODE1
(pin23)
Function
00Equalizer Enable
OPEN TEST MODE (Factory u only)
1
1Equalizer Bypass
(1)Cable loss 0 - 450feet
+  Flat loss
(2)Flat loss only
DSX-3
Equalizer bypass
Equalizer enable
Fig. 1  AK2500B Application
Clock Acquisition
If a valid input signal is assumed to be already prent at the analog input, the maximum time between the application of device power and error-free operation is typically 20 ms.
Table 5. PLL Lock Acquisition Time
(TA = Tmin to Tmax; V+ = 3.3V±0.3V; GND = 0V)
Conditions min typ Max Units
Power up Power : Off  ->  On
Input data : Valid
20ms
Input data restore Power : On
Input data : Loss -> Valid
1.0  5.0ms
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